Patents by Inventor Wei Xiong
Wei Xiong has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240164144Abstract: A display substrate, a manufacturing method therefor, and a display device are provided. The display substrate includes a base substrate, sub-pixels and an isolation portion, and each sub-pixel includes a light-emitting function layer. The isolation portion includes a first sub-isolation portion and a second sub-isolation portion. The first sub-isolation portion is between the second sub-isolation portion and the base substrate. The second sub-isolation portion includes a protrusion protruding relative to an edge of the first sub-isolation portion, the second sub-isolation portion facing one of adjacent sub-pixels is different in shape from the second sub-isolation portion facing the other one; or, a slope angle between a side surface of the first sub-isolation portion or the second sub-isolation portion facing one sub-pixel and a plane parallel to the base substrate is 60° to 120°. At least one film of the light-emitting function layer is disconnected at the isolation portion.Type: ApplicationFiled: October 10, 2022Publication date: May 16, 2024Inventors: Wei ZHANG, Liang SONG, Zhiming REN, Chunfang FAN, Xiaoliang GUO, Donghua JIANG, Wuyang ZHAO, Weiyun HUANG, Zhen WANG, Zhongfei DONG, Hongguang YUAN, Pengyu LIAO, Li XIONG
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Publication number: 20240161436Abstract: Compact LiDAR representation includes performing operations that include generating a three-dimensional (3D) LiDAR image from LiDAR input data, encoding, by an encoder model, the 3D LiDAR image to a continuous embedding in continuous space, and performing, using a code map, a vector quantization of the continuous embedding to generate a discrete embedding. The operations further include decoding, by the decoder model, the discrete embedding to generate modified LiDAR data, and outputting the modified LiDAR data.Type: ApplicationFiled: November 10, 2023Publication date: May 16, 2024Inventors: Yuwen XIONG, Wei-Chiu MA, Jingkang WANG, Raquel URTASUN
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Publication number: 20240160894Abstract: A computing system is provided, including a plurality of processing devices configured to execute a Mixture-of-Experts (MoE) layer included in an MoE model. The MoE layer includes a plurality of expert sub-models that each have a respective plurality of parameter values. The MoE layer is configured to be switchable between a data parallel mode and an expert-data-model parallel mode without conveying the respective parameter values of the expert sub-models among the plurality of processing devices.Type: ApplicationFiled: November 10, 2022Publication date: May 16, 2024Applicant: Microsoft Technology Licensing, LLCInventors: Yifan XIONG, Changho HWANG, Wei CUI, Ziyue YANG, Ze LIU, Han HU, Zilong WANG, Rafael Omar SALAS, Jithin JOSE, Prabhat RAM, Ho-Yuen CHAU, Peng CHENG, Fan YANG, Mao YANG, Yongqiang XIONG
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Publication number: 20240160906Abstract: A computing system including a plurality of processing devices configured to execute a Mixture-of-Experts (MoE) layer included in an MoE model. The processing devices are configured to execute the MoE layer at least in part by, during a first collective communication phase between the processing devices, splitting each of a plurality of first input tensors along a first dimension to obtain first output tensors. Executing the MoE layer further includes processing the first output tensors at a respective a plurality of expert sub-models to obtain a plurality of second input tensors. Executing the MoE layer further includes, during a second collective communication phase between the processing devices, receiving the second input tensors from the expert sub-models and concatenating the second input tensors along the first dimension to obtain second output tensors. Executing the MoE layer further includes outputting the second output tensors as output of the MoE layer.Type: ApplicationFiled: November 10, 2022Publication date: May 16, 2024Applicant: Microsoft Technology Licensing, LLCInventors: Yifan XIONG, Changho HWANG, Wei CUI, Ziyue YANG, Ze LIU, Han HU, Zilong WANG, Rafael Omar SALAS, Jithin JOSE, Prabhat RAM, Ho-Yuen CHAU, Peng CHENG, Fan YANG, Mao YANG, Yongqiang XIONG
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Patent number: 11982945Abstract: A two-photon-polymerization laser direct writing system based on an acousto-optic deflector is provided, which includes an ultrafast laser device, a beam expander, a scanning field center angular dispersion compensator, a two-dimensional acousto-optic deflector, a scanning field edge angular dispersion compensator, an astigmatism compensator and a focusing objective lens, the ultrafast laser device is configured to emit an ultrafast laser; the scanning field center angular dispersion compensator is configured to conduct precompensation on an angular dispersion at a center of a scanning field; the two-dimensional acousto-optic deflector is configured to deflect the ultrafast laser on the angular dispersion at the center of the scanning field; the scanning field edge angular dispersion compensator is configured to compensate for an angular dispersion at an edge of the scanning field; the astigmatism compensator is configured to compensate for astigmatism; the focusing objective lens is configured to conduct tigType: GrantFiled: October 14, 2021Date of Patent: May 14, 2024Assignee: HUAZHONG UNIVERSITY OF SCIENCE AND TECHNOLOGYInventors: Wei Xiong, Binzhang Jiao, Hui Gao, Yuncheng Liu, Xuhao Fan, Leimin Deng
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Patent number: 11983507Abstract: A differential multiplier-accumulator accepts A and B digital inputs plus a sign bit and generates a dot product P by applying the bits of the A input and the bits of the B inputs to respective positive and negative unit elements comprised of groups of AND gates coupled to charge transfer lines through a capacitor Cu. One of the positive and negative unit element is enabled by the sign bit, the enabled unit element receives one bit of the B input applied to all of the AND gates of the unit element, and each positive and negative unit element having the bits of A applied to each associated AND gate input of each unit element, which charge to charge transfer lines, and the charge transfer lines are coupled to binary weighted charge summing capacitors and to an analog to digital converter to generate a digital output product.Type: GrantFiled: December 31, 2020Date of Patent: May 14, 2024Assignee: Ceremorphic, Inc.Inventors: Martin Kraemer, Ryan Boesch, Wei Xiong
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Publication number: 20240155946Abstract: A thermoelectric array display and a manufacturing method thereof are provided. The thermoelectric array display includes at least a first pixel, where the first pixel includes a bottom electrode, a P-type thermoelectric leg, an N-type thermoelectric leg, and a top electrode; the P-type thermoelectric leg is arranged on the bottom electrode; and the P-type thermoelectric leg is connected in series to the N-type thermoelectric leg by the top electrode. The thermoelectric array display has strong concealment of information transmission, can effectively reduce heat generation of a device, and can implement long-distance signal transmission.Type: ApplicationFiled: November 16, 2022Publication date: May 9, 2024Applicant: WUHAN UNIVERSITYInventors: Ziyu WANG, Xingzhong ZHANG, Yong LIU, Wei WU, Xiaosa LIANG, Rui XIONG
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Patent number: 11977885Abstract: An apparatus to facilitate utilizing structured sparsity in systolic arrays is disclosed. The apparatus includes a processor comprising a systolic array to receive data from a plurality of source registers, the data comprising unpacked source data, structured source data that is packed based on sparsity, and metadata corresponding to the structured source data; identify portions of the unpacked source data to multiply with the structured source data, the portions of the unpacked source data identified based on the metadata; and output, to a destination register, a result of multiplication of the portions of the unpacked source data and the structured source data.Type: GrantFiled: November 30, 2020Date of Patent: May 7, 2024Assignee: INTEL CORPORATIONInventors: Subramaniam Maiyuran, Jorge Parra, Ashutosh Garg, Chandra Gurram, Chunhui Mei, Durgesh Borkar, Shubra Marwaha, Supratim Pal, Varghese George, Wei Xiong, Yan Li, Yongsheng Liu, Dipankar Das, Sasikanth Avancha, Dharma Teja Vooturi, Naveen K. Mellempudi
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Patent number: 11977936Abstract: A differential multiplier-accumulator accepts A and B digital inputs and generates a dot product P by applying the bits of the A input and the bits of the B inputs to respective positive and negative unit elements comprised of groups of AND gates coupled to charge transfer lines through a capacitor Cu. Each positive and negative unit element receives one bit of the B input applied to all of the AND gates of the unit element, and each positive and negative unit element having the bits of A applied to each associated AND gate input of each unit element. The AND gates are coupled to charge transfer lines through a capacitor Cu, and the charge transfer lines couple to binary weighted charge summing capacitors and to an analog to digital converter to generate a digital output product. The charge transfer lines may span multiple unit elements.Type: GrantFiled: December 31, 2020Date of Patent: May 7, 2024Assignee: Ceremorphic, Inc.Inventors: Martin Kraemer, Ryan Boesch, Wei Xiong
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Patent number: 11971038Abstract: A single-stage enthalpy enhancing rotary compressor and an air conditioner having same. The single-stage enthalpy enhancing rotary compressor includes: at least one single-stage cylinder, a rotator, an upper flange, and a lower flange. The rotator is arranged inside the cylinder and is rotatable, a compression chamber is formed between the rotator and an inner peripheral wall of the cylinder, a vapor injection opening is defined in at least one of the upper flange the lower flange, and the vapor injection opening is configured to supply gas outside the compressor to the compression chamber directly. According to the present disclosure, two-stage compression is realized without adding an extra cylinder, thereby effectively enhancing a circulation of refrigerant, improving cooling performance of the air conditioner under high environmental temperatures.Type: GrantFiled: September 26, 2022Date of Patent: April 30, 2024Assignee: GREE ELECTRIC APPLIANCES, INC. OF ZHUHAIInventors: Guanghui Xia, Xiaocheng Lai, Shuo Xiong, Junchu Liang, Boming Zhu, Lihui Zhang, Wei Zhu, Xuechao Ding, Fuqiang Zhang, Hao Mei
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Publication number: 20240136736Abstract: This application provides a terminal antenna and a mobile terminal device. The terminal antenna includes a frame, a first feed, and a second feed. A part of the frame on a side of the first gap away from the second gap forms the first conductor, a part of the frame on a side of the second gap away from the first gap forms the second conductor, and the frame between the first gap and the second gap forms the third conductor. The first feed is electrically connected to the first conductor, so that the first conductor radiates a signal, and the second feed is electrically connected to the second conductor, so that the second conductor radiates a signal in a low band.Type: ApplicationFiled: May 5, 2022Publication date: April 25, 2024Inventors: Kaiming DONG, Wei XIONG
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Publication number: 20240135856Abstract: An electronic device may include an electronic display having multiple display pixels that display an image based on dithered image data. The electronic device may also include image processing circuitry that generates the dithered image data based on input image data and a threshold gray level that is greater than one. Generating the dithered image data may include replacing each gray level of the input image data that is less than the threshold gray level with either a zero gray level or the threshold gray level according to a dither pattern.Type: ApplicationFiled: August 8, 2023Publication date: April 25, 2024Inventors: Jongyup Lim, David S Zalatimo, Hyunwoo Nho, Jie Won Ryu, Koorosh Aflatooni, Myungjoon Choi, Wei Xiong
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Patent number: 11961637Abstract: This disclosure relates to a stretchable composite electrode and a fabricating method thereof, and particularly relates to a stretchable composite electrode including a silver nanowire layer and a flexible polymer film and a fabricating method thereof.Type: GrantFiled: December 7, 2022Date of Patent: April 16, 2024Assignee: TPK ADVANCED SOLUTIONS INC.Inventors: Wei Sheng Chen, Ching Mao Huang, Jia Hui Zhou, Huan Ran Yu, Shu Xiong Wang, Chin Hui Lee
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Publication number: 20240118498Abstract: The present disclosure relates to a distribution cable assembly that has various features to enable flexible configurations to accommodate various data center configurations.Type: ApplicationFiled: December 20, 2023Publication date: April 11, 2024Inventors: Lan Bo, Songhua Cao, Ke Jiang, Xu Li, Wei Liu, Peiyou Xiong, Wei Zhang, Shun Sheng Zhou
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Publication number: 20240097599Abstract: A method for protecting a motor from overloading includes: acquiring a present effective value of a phase current of a motor; performing time integration on the present effective value of the phase current, to obtain a first integral value; obtaining a first threshold; performing overload detection according to the first threshold and the first integral value; determining a target limiting current for operation of the motor if an overload occurs; and controlling the operation of the motor based on the target limiting current.Type: ApplicationFiled: November 30, 2023Publication date: March 21, 2024Inventors: Chunsheng WANG, Boliang XU, Wei XIONG, Tao QIN, An CAO
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Publication number: 20240082401Abstract: The present invention provides a bispecific CS1-BCMA CAR-T cell and an application thereof. Specifically, the present invention provides a bispecific CAR, which comprises CS1 scFv and BCMA scFv, and a 4-1BB co-stimulatory domain and a CD3 activation domain. The bispecific CAR-T cell in the present invention has a significant killing effect on CS1 positive target cells and BCMA positive target cells, and can secrete IFN-? against target cells and significantly inhibit the growth of RPMI8226 xenograft tumor in an in vivo experiment. The present invention further provides a preparation method and an application of the bispecific CAR-T cell.Type: ApplicationFiled: January 26, 2022Publication date: March 14, 2024Inventors: Lianjun ZHANG, Heng MEI, Tangyi ZHOU, Xiongbo CHEN, Wei XIONG
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Publication number: 20240086719Abstract: A computing system including a plurality of processing devices configured to execute a Mixture-of-Experts (MoE) layer. The processing devices are configured to execute the MoE layer at least in part by receiving an input tensor including input tokens. Executing the MoE layer further includes computing a gating function output vector based on the input tensor and computing a sparse encoding of the input tensor and the gating function output vector. The sparse encoding indicates one or more destination expert sub-models. Executing the MoE layer further includes dispatching the input tensor for processing at the one or more destination expert sub-models, and further includes computing an expert output tensor. Executing the MoE layer further includes computing an MoE layer output at least in part by computing a sparse decoding of the expert output tensor. Executing the MoE layer further includes conveying the MoE layer output to an additional computing process.Type: ApplicationFiled: May 16, 2023Publication date: March 14, 2024Applicant: Microsoft Technology Licensing, LLCInventors: Yifan XIONG, Changho HWANG, Wei CUI, Ziyue YANG, Ze LIU, Han HU, Zilong WANG, Rafael Omar SALAS, Jithin JOSE, Prabhat RAM, Ho-Yuen CHAU, Peng CHENG, Fan YANG, Mao YANG, Yongqiang XIONG
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Publication number: 20240074474Abstract: Non-meat-derived yeast extracts having rich meat flavor, and a preparation method therefor. The method includes: (1) mixing a yeast extract, vitamins, amino acids and water, and adding reducing sugar as needed; (2) adjusting the pH of a mixture obtained in step (1) at 4.0-8.0 with a pH regulator, and stirring the mixture to react at a temperature of 80-130° C. for 30-180 min to obtain a thermal-heated product; (3) adding vegetable oil into the thermal-heated product, and adding edible salt as needed to obtain a material to be dried; and (4) performing vacuum drying on the material to be dried obtained in step (3), and crushing the dried material. According to the present invention, the yeast extract is taken as a main raw material of a Maillard reaction, and a small amount of vitamins, amino acids and reducing sugar are added, so that the formula is simple.Type: ApplicationFiled: December 10, 2021Publication date: March 7, 2024Inventors: Pei LI, Qi YUAN, Xianwu QIN, Ku LI, Guanqun TANG, Jian XIONG, Wei LI
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Patent number: 11919162Abstract: An identification (ID) number setting method for a modular device that comprises a master building element and a plurality of slave building elements that are connected to the master building element, includes: disconnecting the slave building elements from the master building element; setting ID numbers of all of the slave building elements to be a preset ID number; and assigning new ID numbers to slave building elements of N tiers that are connected to one output interface of the master building element in an order from first tier to Nth tier, wherein the slave building elements of the first tier are slave building elements that are directly connected to the output interface, the slave building elements of the Nth tier are slave building elements that are indirectly connected to the output interface through slave building elements of a (N?1)th tier, N is a natural number greater than 1.Type: GrantFiled: December 24, 2020Date of Patent: March 5, 2024Assignee: UBTECH ROBOTICS CORP LTDInventors: Wei He, Youjun Xiong
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Patent number: 11922240Abstract: A multiplier-accumulator accepts A and B digital inputs and generates a dot product P by applying the bits of the A input and the bits of the B inputs to unit elements comprised of groups of AND gates coupled to charge transfer lines through a capacitor Cu. The number of bits in the B input is a number of AND-groups and the number of bits in A is the number of AND gates in an AND-group. Each unit element receives one bit of the B input applied to all of the AND gates of the unit element, and each unit element having the bits of A applied to each associated AND gate input of each unit element. The AND gates are coupled to charge transfer lines through a capacitor Cu, and the charge transfer lines couple to binary weighted charge summing capacitors which sum and scale the charges from the charge transfer lines, the charge coupled to an analog to digital converter which forms the dot product output. The charge transfer lines may span multiple unit elements.Type: GrantFiled: December 31, 2020Date of Patent: March 5, 2024Assignee: Ceremorphic, Inc.Inventors: Ryan Boesch, Martin Kraemer, Wei Xiong