Patents by Inventor Wei-Yi Wei

Wei-Yi Wei has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240171309
    Abstract: A data transmission apparatus includes a transmit-side circuit and a receive-side circuit. The transmit-side circuit belongs to a first clock domain, and is configured to store a plurality of input data. The receive-side circuit belongs to a second clock domain, and is configured to read a plurality of output data from the transmit-side circuit. The transmit-side circuit is configured to calculate a transmit-side parity value according to the plurality of input data. The receive-side circuit is configured to calculate a receive-side parity value according to the plurality of output data. The receive-side circuit is configured to compare the transmit-side parity value with the receive-side parity value to generate a control signal. The transmit-side circuit and the receive-side circuit are configured to reset, according to the control signal, a write pointer of the transmit-side circuit and a read pointer of the receive-side circuit.
    Type: Application
    Filed: October 15, 2023
    Publication date: May 23, 2024
    Inventor: Wei-Yi WEI
  • Publication number: 20230308313
    Abstract: A communication apparatus and an associated method are disclosed. The communication apparatus includes differential input ports; a signal pairing circuit, arranged for coupling the differential input ports to a receiving circuit, wherein when the signal pairing circuit operates in a first mode, a positive input port and a negative input port of the differential input ports correspondingly electrically couple to a positive input terminal and a negative input terminal of the receiving circuit, when the signal pairing circuit operates in a second mode, the positive input port and the negative input port of the differential input ports correspondingly electrically couple to the negative input terminal and the positive input terminal of the receiving circuit; a processor circuit, arranged for determining whether the decoded signal includes a specific code before the timer is time out and generating a determination result; and control the signal pairing circuit according to the determination result.
    Type: Application
    Filed: March 19, 2023
    Publication date: September 28, 2023
    Inventors: TE LUNG FANG, CHIH CHIEH YEN, JEN-HAO YEH, WEI-YI WEI
  • Patent number: 11461255
    Abstract: An electronic device, a network switch and an interrupt transmitting and receiving method are provided. The electronic device includes a slave chip and a main chip. The slave chip is configured to generate a plurality of data segments and at least one interrupt message and includes an encoder. The encoder is configured to encode the data segments and the interrupt message to generate a digital data. The interrupt message is arranged between the data segments. The main chip, which is coupled to the slave chip, is configured to receive the digital data and includes a decoder and a control circuit. The decoder is configured to decode the digital data to obtain the data segments and the interrupt message. The control circuit is coupled to the decoder and is configured to process the interrupt message.
    Type: Grant
    Filed: October 6, 2020
    Date of Patent: October 4, 2022
    Assignee: REALTEK SEMICONDUCTOR CORPORATION
    Inventor: Wei-Yi Wei
  • Publication number: 20210117351
    Abstract: An electronic device, a network switch and an interrupt transmitting and receiving method are provided. The electronic device includes a slave chip and a main chip. The slave chip is configured to generate a plurality of data segments and at least one interrupt message and includes an encoder. The encoder is configured to encode the data segments and the interrupt message to generate a digital data. The interrupt message is arranged between the data segments. The main chip, which is coupled to the slave chip, is configured to receive the digital data and includes a decoder and a control circuit. The decoder is configured to decode the digital data to obtain the data segments and the interrupt message. The control circuit is coupled to the decoder and is configured to process the interrupt message.
    Type: Application
    Filed: October 6, 2020
    Publication date: April 22, 2021
    Inventor: WEI-YI WEI
  • Patent number: 8237694
    Abstract: In a first display period of a display device, a first count value is recorded at the rising edge of the data enable signal for controlling the length of a horizontal line. Next, a second count value is recorded at the falling edge of the data enable signal for identifying the time when the data enable signal switches from a high level to a low level. When entering a porch period following the first display period, the counter is cleared when the count value reaches the first count value. In a second display period following the porch period, the counter is cleared at the rising edge of the data enable signal, and the first count value is used for controlling the length of the horizontal line.
    Type: Grant
    Filed: April 6, 2009
    Date of Patent: August 7, 2012
    Assignee: NOVATEK Microelectronics Corp.
    Inventors: Chia-Hsin Tung, Wing-Kai Tang, Wei-Yi Wei
  • Patent number: 8028213
    Abstract: A data transformation method for a testing system includes using a reception end for receiving a test signal comprising a test data and a timing information corresponding to the test data, and using a transformation unit for transforming the test data according to the timing information, so as to generate a test pattern utilized for testing a communication device.
    Type: Grant
    Filed: May 26, 2008
    Date of Patent: September 27, 2011
    Assignee: NOVATEK Microelectronics Corp.
    Inventors: Chih-Wei Tang, Chien-Yu Wei, Wei-Yi Wei, Jia-Jye Shyu
  • Publication number: 20100177067
    Abstract: In a first display period of a display device, a first count value is recorded at the rising edge of the data enable signal for controlling the length of a horizontal line. Next, a second count value is recorded at the falling edge of the data enable signal for identifying the time when the data enable signal switches from a high level to a low level. When entering a porch period following the first display period, the counter is cleared when the count value reaches the first count value. In a second display period following the porch period, the counter is cleared at the rising edge of the data enable signal, and the first count value is used for controlling the length of the horizontal line.
    Type: Application
    Filed: April 6, 2009
    Publication date: July 15, 2010
    Inventors: Chia-Hsin Tung, Wing-Kai Tang, Wei-Yi Wei
  • Publication number: 20090296797
    Abstract: A data description method for a serial transmission interface includes generating a low-speed data and a high-speed data simultaneously, sampling the low-speed data to generate a first sampling result according to a first sampling rate within a specified duration, sampling the high-speed data to generate a second sampling result according to a second sampling rate within the specified duration, and combining the first sampling result and the second sampling result to describe contents of the low-speed data and the high-speed data within the specified duration.
    Type: Application
    Filed: September 15, 2008
    Publication date: December 3, 2009
    Inventors: Wei-Yi Wei, Chien-Yu Wei, Chih-Wei Tang
  • Publication number: 20090271677
    Abstract: A data transformation method for a testing system includes receiving a test signal comprising a test data and a timing information corresponding to the test data, and transforming the test data according to the timing information, so as to generate a test pattern.
    Type: Application
    Filed: May 26, 2008
    Publication date: October 29, 2009
    Inventors: Chih-Wei Tang, Chien-Yu Wei, Wei-Yi Wei, Jia-Jye Shyu