Abstract: An electronic package includes an electronic component and a heat dissipation structure, wherein the heat dissipation structure has a plurality of bonding pillars, and a metal layer is formed on the bonding pillars, so as to stably dispose the heat dissipation structure on the electronic component via the bonding pillars and the metal layer.

Abstract: An imaging optical lens assembly includes nine lens elements which are, in order from an object side to an image side along an optical path: a first lens element, a second lens element, a third lens element, a fourth lens element, a fifth lens element, a sixth lens element, a seventh lens element, an eighth lens element and a ninth lens element. The first lens element has positive refractive power. The eighth lens element with positive refractive power has an image-side surface being convex in a paraxial region thereof. The ninth lens element has an image-side surface being concave in a paraxial region thereof, and the image-side surface of the ninth lens element has at least one convex critical point in an off-axis region thereof.

Abstract: In some embodiments, the present disclosure relates to a device having a semiconductor substrate including a frontside and a backside. On the frontside of the semiconductor substrate are a first source/drain region and a second source/drain region. A gate electrode is arranged on the frontside of the semiconductor substrate and includes a horizontal portion, a first vertical portion, and a second vertical portion. The horizontal portion is arranged over the frontside of the semiconductor substrate and between the first and second source/drain regions. The first vertical portion extends from the frontside towards the backside of the semiconductor substrate and contacts the horizontal portion of the gate electrode structure. The second vertical portion extends from the frontside towards the backside of the semiconductor substrate, contacts the horizontal portion of the gate electrode structure, and is separated from the first vertical portion by a channel region of the substrate.

Abstract: A method of manufacturing a package structure at least includes the following steps. An encapsulant laterally is formed to encapsulate the die and the plurality of through vias. A plurality of first connectors are formed to electrically connect to first surfaces of the plurality of through vias. A warpage control material is formed over the die, wherein the warpage control material is disposed to cover an entire surface of the die. A protection material is formed over the encapsulant and around the plurality of first connectors and the warpage control material. A coefficient of thermal expansion of the protection material is less than a coefficient of thermal expansion of the encapsulant.

Abstract: Methods, apparatuses, and non-transitory computer-readable storage mediums are provided for video decoding. In one method, a decoder receives a Sequence Parameter Set (SPS) rice extension flag that indicates whether an extension of rice parameter derivation for binarization of abs_remainder and dec_abs_level is enabled. In a second method, the decoder may receive a Sequence Parameter Set (SPS) rice adaption enabled flag that indicates whether rice parameter derivation for binarization of abs_remainder and dec_abs_level is used.

Abstract: In an embodiment, a method includes: aligning a first package component with a second package component, the first package component having a first region and a second region, the first region including a first conductive connector, the second region including a second conductive connector; performing a first laser shot on a first portion of a top surface of the first package component, the first laser shot reflowing the first conductive connector of the first region, the first portion of the top surface of the first package component completely overlapping the first region; and after performing the first laser shot, performing a second laser shot on a second portion of the top surface of the first package component, the second laser shot reflowing the second conductive connector of the second region, the second portion of the top surface of the first package component completely overlapping the second region.

Abstract: An image capturing optical lens system includes four lens elements, which are, in order from an object side to an image side along an optical path, a first lens element, a second lens element, a third lens element and a fourth lens element. The first lens element has an object-side surface being convex in a paraxial region thereof. The third lens element with positive refractive power has an object-side surface being convex in a paraxial region thereof and an image-side surface being concave in a paraxial region thereof. The fourth lens element has negative refractive power.

Abstract: A photographing optical lens assembly includes, in order from an object side to an image side, a first lens element, a second lens element, a third lens element, a fourth lens element, a fifth lens element, a sixth lens element and a seventh lens element. The first lens element with refractive power has an object-side surface being convex in a paraxial region thereof. Each second, third, fourth and fifth lens element has refractive power. The sixth lens element with negative refractive power has an object-side surface being concave in a paraxial region thereof and an image-side surface being convex in a paraxial region thereof, and both of the surfaces of the sixth lens element are aspheric. The seventh lens element with refractive power has an image-side surface being concave in a paraxial region thereof, wherein the image-side surface has at least one convex shape in an off-axis region thereof.

Abstract: A semiconductor device includes a substrate. The semiconductor device includes a fin that is formed over the substrate and extends along a first direction. The semiconductor device includes a gate structure that straddles the fin and extends along a second direction perpendicular to the first direction. The semiconductor device includes a first source/drain structure coupled to a first end of the fin along the first direction. The gate structure includes a first portion protruding toward the first source/drain structure along the first direction. A tip edge of the first protruded portion is vertically above a bottom surface of the gate structure.

Abstract: A method of manufacturing a semiconductor device includes forming a first layer of a first planarizing material over a patterned surface of a substrate, forming a second layer of a second planarizing material over the first planarizing layer, crosslinking a portion of the first planarizing material and a portion of the second planarizing material, and removing a portion of the second planarizing material that is not crosslinked. In an embodiment, the method further includes forming a third layer of a third planarizing material over the second planarizing material after removing the portion of the second planarizing material that is not crosslinked. The third planarizing material can include a bottom anti-reflective coating or a spin-on carbon, and an acid or an acid generator. The first planarizing material can include a spin-on carbon, and an acid, a thermal acid generator or a photoacid generator.

Abstract: A method and apparatus are disclosed. In an example from the perspective of a first device, a grant is received from a network node. The grant allocates a set of sidelink data resources. One or more sidelink data transmissions are performed on the set of sidelink data resources. A second feedback information associated with the one or more sidelink data transmissions is received and/or detected. An uplink resource is derived. A first feedback information is transmitted on the uplink resource to the network node. The first feedback information is set based upon the second feedback information.

Abstract: This disclosure provides an image capturing optical lens assembly including, in order from an object side to an image side: a first lens element with refractive power having an object-side surface being convex in a paraxial region thereof a second lens element having positive refractive power; a third lens element with refractive power having an image-side surface being concave in a paraxial region thereof a fourth lens element with refractive power having an image-side surface being concave in a paraxial region thereof, wherein both surfaces thereof being aspheric; a fifth lens element with refractive power having an object-side surface being concave in a paraxial region thereof and a sixth lens element with refractive power having an image-side surface being concave in a paraxial region thereof, wherein both surfaces thereof being aspheric, and the image-side surface having at least one convex shape in an off-axis region thereof.

Abstract: A package structure includes a die, an encapsulant laterally encapsulating the die, a warpage control material disposed over the die, and a protection material disposed over the encapsulant and around the warpage control material. A coefficient of thermal expansion of the protection material is less than a coefficient of thermal expansion of the encapsulant.

Abstract: An apparatus to facilitate data prefetching is disclosed. The apparatus includes a cache, one or more execution units (EUs) to execute program code, prefetch logic to maintain tracking information of memory instructions in the program code that trigger a cache miss and compiler logic to receive the tracking information, insert one or more pre-fetch instructions in updated program code to prefetch data from a memory for execution of one or more of the memory instructions that triggered a cache miss and download the updated program code for execution by the one or more EUs.

Abstract: A semiconductor device includes source/drain regions, a gate structure, a first gate spacer, and a dielectric material. The source/drain regions are over a substrate. The gate structure is laterally between the source/drain regions. The first gate spacer is on a first sidewall of the gate structure, and spaced apart from a first one of the source/drain regions at least in part by a void region. The dielectric material is between the first one of the source/drain regions and the void region. The dielectric material has a gradient ratio of a first chemical element to a second chemical element.

Abstract: An optical imaging lens assembly includes seven lens elements which are, in order from an object side to an image side: a first lens element, a second lens element, a third lens element, a fourth lens element, a fifth lens element, a sixth lens element and a seventh lens element. The seventh lens element has an image-side surface being concave in a paraxial region thereof. At least one of an object-side surface and the image-side surface of the seventh lens element has at least one critical point in an off-axis region thereof. The object-side surface and the image-side surface of the seventh lens element are both aspheric.

Abstract: A semiconductor structure includes a barrier layer over a channel layer, and a doped layer over the barrier layer. A gate electrode is over the doped layer and a doped interface layer is formed between the barrier layer and the doped layer. The doped interface layer includes a dopant and a metal. The metal has a metal concentration that follows a gradient function from a highest metal concentration to a lowest metal concentration.

Abstract: The present disclosure relates to an integrated chip. The integrated chip includes an image sensing element disposed within a substrate. A gate structure is disposed along a front-side of the substrate. A back-side of the substrate includes one or more first angled surfaces defining a central diffuser disposed over the image sensing element. The back-side of the substrate further includes second angled surfaces defining a plurality of peripheral diffusers laterally surrounding the central diffuser. The plurality of peripheral diffusers are a smaller size than the central diffuser.

Abstract: A package structure and the manufacturing method thereof are provided. The package structure includes a first package including at least one first semiconductor die encapsulated in an insulating encapsulation and through insulator vias electrically connected to the at least one first semiconductor die, a second package including at least one second semiconductor die and conductive pads electrically connected to the at least one second semiconductor die, and solder joints located between the first package and the second package. The through insulator vias are encapsulated in the insulating encapsulation. The first package and the second package are electrically connected through the solder joints. A maximum size of the solder joints is greater than a maximum size of the through insulator vias measuring along a horizontal direction, and is greater than or substantially equal to a maximum size of the conductive pads measuring along the horizontal direction.

Abstract: A package structure including a redistribution circuit structure, a wiring substrate, first conductive terminals, an insulating encapsulation, and a semiconductor device is provided. The redistribution circuit structure includes stacked dielectric layers, redistribution wirings and first conductive pads. The first conductive pads are disposed on a surface of an outermost dielectric layer among the stacked dielectric layers, the first conductive pads are electrically connected to outermost redistribution pads among the redistribution wirings by via openings of the outermost dielectric layer, and a first lateral dimension of the via openings is greater than a half of a second lateral dimension of the outermost redistribution pads. The wiring substrate includes second conductive pads. The first conductive terminals are disposed between the first conductive pads and the second conductive pads. The insulating encapsulation is disposed on the surface of the redistribution circuit structure.