Patents by Inventor Weihang Zhang

Weihang Zhang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11538930
    Abstract: A bidirectional blocking monolithic heterogeneous integrated Cascode-structure field effect transistor, which mainly solves a problem that the existing monolithic heterogeneous integrated Cascode-structure field effect transistor has no reverse blocking characteristic. The field effect transistor includes a substrate, a GaN buffer layer, an AlGaN barrier layer and a SiN isolation layer, wherein an isolation groove is etched in the middle of the SiN isolation layer, a Si active layer is printed on the SiN isolation layer on one side of the isolation groove so as to prepare a Si metal oxide semiconductor field effect transistor, and a GaN high-electron-mobility transistor is prepared on the other side of the isolation groove, and a drain electrode of the GaN high-electron-mobility transistor is in Schottky contact with the AlGaN barrier layer to form a bidirectional blocking monolithic heterogeneous integrated Cascode-structure field effect transistor.
    Type: Grant
    Filed: March 15, 2021
    Date of Patent: December 27, 2022
    Assignee: Xidian University
    Inventors: Chunfu Zhang, Weihang Zhang, Jiaqi Zhang, Guofang Yang, Yichang Wu, Dazheng Chen, Jincheng Zhang, Yue Hao
  • Publication number: 20220310796
    Abstract: A material structure for silicon-based gallium nitride microwave and millimeter-wave devices and a manufacturing method thereof are provided. The material structure includes: a silicon substrate; a dielectric layer of high thermal conductivity, disposed on an upper surface of the silicon substrate, and an uneven first patterned interface being formed between the dielectric layer and the silicon substrate; a buffer layer, disposed on an upper surface of the dielectric layer, and an uneven second patterned interface being formed between the buffer layer and the dielectric layer; a channel layer, disposed on an upper surface of the buffer layer; and a composite barrier layer, disposed on an upper surface of the channel layer. In the material structure, the uneven patterned interfaces increase contact areas of the interfaces, a thermal boundary resistance and a thermal resistance of device are reduced, and a heat dissipation performance of device is improved.
    Type: Application
    Filed: March 5, 2021
    Publication date: September 29, 2022
    Inventors: JINCHENG ZHANG, LU HAO, ZHIHONG LIU, JUNWEI LIU, KUNLU SONG, YACHAO ZHANG, WEIHANG ZHANG, YUE HAO
  • Publication number: 20220108885
    Abstract: A method for preparing an AlN based template having a Si substrate and a method for preparing a GaN based epitaxial structure having a Si substrate are provided. The method for preparing the AlN based template having the Si substrate, which includes: providing the Si substrate; growing an AlN nucleation layer on the Si substrate; and introducing an ion passing through the AlN nucleation layer and into the Si substrate. After the AlN nucleation layer is prepared on the Si substrate, the ions are introduced into the Si substrate and the AlN nucleation layer through the AlN nucleation layer. In this way, types of the introduced ions can be expanded. In addition, a carrier concentration at an interface between the Si substrate and the AlN nucleation layer and a carrier concentration in the AlN nucleation layer can also be reduced.
    Type: Application
    Filed: February 8, 2021
    Publication date: April 7, 2022
    Inventors: Zhihong LIU, Junwei LIU, Jincheng ZHANG, Lu HAO, Kunlu SONG, Hong ZHOU, Shenglei ZHAO, Yachao ZHANG, Weihang ZHANG, Yue HAO
  • Publication number: 20220037515
    Abstract: A bidirectional blocking monolithic heterogeneous integrated Cascode-structure field effect transistor, which mainly solves a problem that the existing monolithic heterogeneous integrated Cascode-structure field effect transistor has no reverse blocking characteristic. The field effect transistor includes a substrate, a GaN buffer layer, an AlGaN barrier layer and a SiN isolation layer, wherein an isolation groove is etched in the middle of the SiN isolation layer, a Si active layer is printed on the SiN isolation layer on one side of the isolation groove so as to prepare a Si metal oxide semiconductor field effect transistor, and a GaN high-electron-mobility transistor is prepared on the other side of the isolation groove, and a drain electrode of the GaN high-electron-mobility transistor is in Schottky contact with the AlGaN barrier layer to form a bidirectional blocking monolithic heterogeneous integrated Cascode-structure field effect transistor.
    Type: Application
    Filed: March 15, 2021
    Publication date: February 3, 2022
    Inventors: Chunfu ZHANG, Weihang ZHANG, Jiaqi ZHANG, Guofang YANG, Yichang WU, Dazheng CHEN, Jincheng ZHANG, Yue HAO
  • Patent number: 10508938
    Abstract: Fiber optical Fabry-Perot flow test device with local bending diversion structure, having an inlet flange, a test tube and an outlet flange, with both a fiber optical Fabry-Perot pressure sensor at high-pressure-side and a fiber optical Fabry-Perot pressure sensor at low-pressure-side, which are fixedly connected to the test tube through an auxiliary connecting device.
    Type: Grant
    Filed: October 27, 2016
    Date of Patent: December 17, 2019
    Assignee: Tianjin University
    Inventors: Tiegen Liu, Junfeng Jiang, Huijia Yang, Kun Liu, Shuang Wang, Weihang Zhang