Patents by Inventor Wen-Cheng Huang

Wen-Cheng Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11982866
    Abstract: An optical element driving mechanism is provided and includes a fixed assembly, a movable assembly, a driving assembly and a stopping assembly. The fixed assembly has a main axis. The movable assembly is configured to connect an optical element, and the movable assembly is movable relative to the fixed assembly. The driving assembly is configured to drive the movable assembly to move relative to the fixed assembly. The stopping assembly is configured to limit the movement of the movable assembly relative to the fixed assembly within a range of motion.
    Type: Grant
    Filed: December 15, 2022
    Date of Patent: May 14, 2024
    Assignee: TDK TAIWAN CORP.
    Inventors: Chao-Chang Hu, Liang-Ting Ho, Chen-Er Hsu, Yi-Liang Chan, Fu-Lai Tseng, Fu-Yuan Wu, Chen-Chi Kuo, Ying-Jen Wang, Wei-Han Hsia, Yi-Hsin Tseng, Wen-Chang Lin, Chun-Chia Liao, Shou-Jen Liu, Chao-Chun Chang, Yi-Chieh Lin, Shang-Yu Hsu, Yu-Huai Liao, Shih-Wei Hung, Sin-Hong Lin, Kun-Shih Lin, Yu-Cheng Lin, Wen-Yen Huang, Wei-Jhe Shen, Chih-Shiang Wu, Sin-Jhong Song, Che-Hsiang Chiu, Sheng-Chang Lin
  • Patent number: 11966322
    Abstract: A method, computer program product and system are provided for preloading debug information based on the presence of incremental source code files. Based on parsed input parameters to a source code debugger, a source code repository and a local storage area are searched for an incremental file. In response to the incremental file being located, a preload indicator in the incremental file, which is a source code file, is set. Based on the preload indicator being set, debug symbol data from the incremental file is merged to a preload symbol list. In response to receiving a command to examine the debug symbol data from the incremental file, the preload symbol list is searched for the requested debug symbol data.
    Type: Grant
    Filed: November 25, 2020
    Date of Patent: April 23, 2024
    Assignee: International Business Machines Corporation
    Inventors: Xiao Ling Chen, Xiao Xuan Fu, Jiang Yi Liu, Zhan Peng Huo, Wen Ji Huang, Qing Yu Pei, Min Cheng, Yan Huang
  • Patent number: 11961826
    Abstract: Bonded wafer device structures, such as a wafer-on-wafer (WoW) structures, and methods of fabricating bonded wafer device structures, including an array of contact pads formed in an interconnect level of at least one wafer of the bonded wafer device structure. The array of contact pads formed in an interconnect level of at least one wafer may have an array pattern that corresponds to an array pattern of contact pads that is subsequently formed over a surface of the bonded wafer structure. The array of contact pads formed in an interconnect level of at least one wafer of the bonded wafer device structure may enable improved testing of individual wafers, including circuit probe testing, prior to the wafer being stacked and bonded to one or more additional wafers to form a bonded wafer structure.
    Type: Grant
    Filed: March 22, 2023
    Date of Patent: April 16, 2024
    Inventors: Harry-Hak-Lay Chuang, Wei-Cheng Wu, Wen-Tuo Huang
  • Patent number: 11962743
    Abstract: A 3D display system and a 3D display method are provided. The 3D display system includes a 3D display, a memory, and a processor. The processor is coupled to the 3D display and the memory and is configured to execute the following steps. As a first type application program is executed, an image content of the first type application program is captured, and a stereo format image is generated according to the image content of the first type application program. The stereo format image is delivered to a runtime complying with a specific development standard through an application program interface complying with the specific development standard. A display frame processing associated with the 3D display is performed on the stereo format image through the runtime, and a 3D display image content generated by the display frame processing is provided to the 3D display for displaying.
    Type: Grant
    Filed: January 19, 2022
    Date of Patent: April 16, 2024
    Assignee: Acer Incorporated
    Inventors: Shih-Hao Lin, Chao-Kuang Yang, Wen-Cheng Hsu, Hsi Lin, Chih-Wen Huang
  • Publication number: 20240121899
    Abstract: An electronic device includes a substrate, a plurality of flexible circuit boards, a plurality of ICs and an insulator. The flexible circuit boards are disposed on the substrate. In a top view of the electronic device, the flexible circuit boards are overlapped with an edge of the substrate. The ICs are disposed on the substrate. The insulator is disposed on the flexible circuit boards and contacted the ICs, wherein the insulator has a first side and a second side opposite to the first side and the first side is closer to the edge than the second side. Along a first direction perpendicular to an extension direction of the edge, a first minimum distance between the second side and one of the ICs is less than a second minimum distance between the second side and one of the flexible circuit boards.
    Type: Application
    Filed: December 19, 2023
    Publication date: April 11, 2024
    Inventors: Chin-Cheng Kuo, Chia-Chun Yang, Wen-Cheng Huang
  • Patent number: 11949051
    Abstract: A wavelength conversion member includes a substrate, a phosphor layer, and a ventilated blade. The substrate is configured to rotate based on an axis. The phosphor layer is disposed on the substrate. The ventilated blade is disposed on the substrate and has a pore density between 10 ppi and 500 ppi or a volume porosity between 5% and 95%.
    Type: Grant
    Filed: January 25, 2021
    Date of Patent: April 2, 2024
    Assignee: DELTA ELECTRONICS, INC.
    Inventors: Yen-I Chou, Jih-Chi Li, Wen-Cheng Huang
  • Publication number: 20240093373
    Abstract: A method for preparing antibacterial stainless steel by surface alloying includes the steps of coating an infiltration promoter layer on a stainless steel surface, coating an antibacterial metal layer on a surface of the infiltration promoter layer, and performing heat treatment of the stainless steel to diffuse an antibacterial metal into the stainless steel. This method can be applied to various types of stainless steel, and the antibacterial metal can be diffused and quenched into the stainless steel, such that the finally formed surface of the stainless steel has an antibacterial alloy layer with a specific thickness to provide better corrosion resistance and antibacterial ability without changing the advantages and properties of the antibacterial metal or stainless steel substrate, and the thickness and concentration of the antibacterial metal layer, and the parameters for heat treatment can be adjusted to control the chemical composition and thickness of the antibacterial alloy layer.
    Type: Application
    Filed: November 16, 2022
    Publication date: March 21, 2024
    Inventors: WEN-TA TSAI, BERNARD HAOCHIH LIU, ZHI-YAN CHEN, CHONG-CHENG HUANG
  • Patent number: 11931456
    Abstract: A pharmaceutical composition containing a mixed polymeric micelle and a drug enclosed in the micelle, in which the mixed polymeric micelle, 1 to 1000 nm in size, includes an amphiphilic block copolymer and a lipopolymer. Also disclosed are preparation of the pharmaceutical composition and use thereof for treating cancer.
    Type: Grant
    Filed: November 16, 2022
    Date of Patent: March 19, 2024
    Assignee: MegaPro Biomedical Co. Ltd.
    Inventors: Ming-Cheng Wei, Yuan-Hung Hsu, Wen-Yuan Hsieh, Chia-Wen Huang, Chih-Lung Chen, Jhih-Yun Jian, Shian-Jy Wang
  • Publication number: 20240088246
    Abstract: Various embodiments of the present application are directed towards a control gate layout to improve an etch process window for word lines. In some embodiments, an integrated chip comprises a memory array, an erase gate, a word line, and a control gate. The memory array comprises a plurality of cells in a plurality of rows and a plurality of columns. The erase gate and the word line are elongated in parallel along a row of the memory array. The control gate is elongated along the row and is between and borders the erase gate and the word line. Further, the control gate has a pad region protruding towards the erase gate and the word line. Because the pad region protrudes towards the erase gate and the word line, a width of the pad region is spread between word-line and erase-gate sides of the control gate.
    Type: Application
    Filed: November 16, 2023
    Publication date: March 14, 2024
    Inventors: Yu-Ling Hsu, Ping-Cheng Li, Hung-Ling Shih, Po-Wei Liu, Wen-Tuo Huang, Yong-Shiuan Tsair, Chia-Sheng Lin, Shih Kuang Yang
  • Publication number: 20240079263
    Abstract: A wafer container includes a frame, a door and at least a pair of shelves. The frame has opposite sidewalls. The pair of the shelves are respectively disposed and aligned on the opposite sidewalls of the frame. Various methods and devices are provided for holding at least one wafer to the shelves during transport.
    Type: Application
    Filed: February 22, 2023
    Publication date: March 7, 2024
    Inventors: Kai-Hung HSIAO, Chi-Chung JEN, Yu-Chun SHEN, Yuan-Cheng KUO, Chih-Hsiung HUANG, Wen-Chih CHIANG
  • Publication number: 20240079850
    Abstract: A semiconductor device includes a first contact layer, a second contact layer, an active layer, a photonic crystal layer, a passivation layer, a first electrode and a second electrode. The first contact layer has a first surface and a second surface opposite to each other. Microstructures are located on the second surface. The second contact layer is located below the first surface. The active layer is located between the first contact layer and the second contact layer. The photonic crystal layer is located between the active layer and the second contact layer. The passivation layer is located on the second contact layer. The first electrode is located on the passivation layer and is electrically connected the first surface of the first contact layer. The second electrode is located on the passivation layer and is electrically connected to the second contact layer.
    Type: Application
    Filed: December 28, 2022
    Publication date: March 7, 2024
    Inventors: Wen-Cheng HSU, Yu-Heng HONG, Yao-Wei HUANG, Kuo-Bin HONG, Hao-Chung KUO
  • Publication number: 20240073038
    Abstract: A certificate requesting method, a certificate issuing method, a certificate system and a computer-readable medium thereof are provided, in which subscriber identity identification information, a private key and a public key certificate bound to a first security chip are converted into a private key bound to a second security chip via an online identity authentication procedure, and the corresponding public key certificate is issued by a certificate authority server, so as to improve the usability, the convenience and the security thereof.
    Type: Application
    Filed: August 30, 2023
    Publication date: February 29, 2024
    Inventors: Wen-Cheng WANG, Yao-Kuan HUANG, Wan-Ju YANG
  • Publication number: 20240072219
    Abstract: A wavelength conversion member includes a substrate, a phosphor layer, and a non-ventilated blade. The substrate is configured to rotate based on an axis. The phosphor layer is disposed on the substrate. The non-ventilated blade has a roughness between 5 ?m and 1.25 mm, or a specific surface area of the non-ventilated blade exceeds a geometric area of the non-ventilated blade by more than 10%.
    Type: Application
    Filed: November 7, 2023
    Publication date: February 29, 2024
    Inventors: Yen-I CHOU, Jih-Chi LI, Wen-Cheng HUANG
  • Publication number: 20240071911
    Abstract: A semiconductor device includes a first die having a first bonding layer; a second die having a second bonding layer disposed over and bonded to the first bonding layer; a plurality of bonding members, wherein each of the plurality of bonding members extends within the first bonding layer and the second bonding layer, wherein the plurality of bonding members includes a connecting member electrically connected to a first conductive pattern in the first die and a second conductive pattern in the second die, and a dummy member electrically isolated from the first conductive pattern and the second conductive pattern; and an inductor disposed within the first bonding layer and the second bonding layer. A method of manufacturing a semiconductor device includes bonding a first inductive coil of a first die to a second inductive coil of a second die to form an inductor.
    Type: Application
    Filed: January 31, 2023
    Publication date: February 29, 2024
    Inventors: Harry-Haklay Chuang, Wen-Tuo Huang, Li-Feng Teng, Wei-Cheng Wu, Yu-Jen Wang
  • Publication number: 20240053627
    Abstract: An electronic device including an active region and a peripheral region, and includes a substrate including a first edge and a second edge; a first electrode layer disposed on the substrate; a first conductive glue disposed on the substrate and in the peripheral region; a second conductive glue disposed on the substrate and in the peripheral region; an insulating glue overlapped with the first conductive glue and the second conductive glue; and a first metal element fixed on the first electrode layer through the first conductive glue and the insulating glue; wherein in a top view, the insulating glue is disposed in the peripheral region and extends along an extension direction parallel to the first edge, and along the extension direction, a first distance between the first conductive glue and the second edge is greater than a second distance between the second conductive glue and the second edge.
    Type: Application
    Filed: October 27, 2023
    Publication date: February 15, 2024
    Inventors: Wen-Cheng HUANG, Bi-Ly LIN, Chia-Chun YANG, Ying- Jung WU, Chien-Wei TSENG
  • Patent number: 11889627
    Abstract: A display device includes a first substrate, a second substrate, a plurality of drive ICs and at least one flexible circuit board. The first substrate has a first region and a second region near to the first region. The second substrate is disposed on the first region and has a lateral side. The plurality of drive ICs are disposed on the second region and arranged along the lateral side. The at least one flexible circuit board is disposed on the second region and disposed correspondingly to the lateral side. Wherein in a top view of the display device, each of the plurality of drive ICs does not overlap with the at least one flexible circuit board in a direction perpendicular to an extending direction of the lateral side.
    Type: Grant
    Filed: April 6, 2021
    Date of Patent: January 30, 2024
    Assignee: INNOLUX CORPORATION
    Inventors: Chin-Cheng Kuo, Chia-Chun Yang, Wen-Cheng Huang
  • Publication number: 20240032236
    Abstract: A heat dissipation assembly is disclosed and includes a fan, a vapor chamber and a heat dissipation fin set. The fan includes a fan frame, an impeller and a fan cover. The impeller is disposed on the fan frame and accommodated in an accommodation space. The impeller includes plural metal blades and a hub, and the plural metal blades are radially arranged on the periphery of the hub to form a dense-metal-blade impeller. The fan cover is assembled with the fan frame to form an outlet, and the fan cover includes an inlet. The vapor chamber includes an upper plate and a lower plate assembled with each other. The upper plate or the lower plate is connected to the fan cover, and the vapor chamber and the fan cover are coplanar. The heat dissipation fin set is connected to the lower plate and spatially corresponding to the outlet.
    Type: Application
    Filed: November 7, 2022
    Publication date: January 25, 2024
    Inventors: Chin-Ting Chen, Chih-Wei Yang, Shu-Cheng Yang, Che-Wei Chang, Wen-Cheng Huang, Chin-Hung Lee, Chih-Wei Chan
  • Patent number: 11835805
    Abstract: An electronic device includes a first substrate; a second substrate arranged opposite to the first substrate; a first electrode layer disposed on the first substrate; a display medium layer disposed between the first electrode layer and the second substrate; and a first metal element, wherein the first metal element is fixed on the first electrode layer through a conductive glue and an insulating glue; wherein in a normal direction of the first substrate, the conductive glue and the insulating glue are overlapped.
    Type: Grant
    Filed: May 20, 2022
    Date of Patent: December 5, 2023
    Assignee: INNOLUX CORPORATION
    Inventors: Wen-Cheng Huang, Bi-Ly Lin, Chia-Chun Yang, Ying-Jung Wu, Chien-Wei Tseng
  • Patent number: 11760979
    Abstract: An isolated rat liver cancer stem cell line which is named as TW-1 is provided. A method for drug screening by using the isolated rat liver cancer stem cell line is also provided.
    Type: Grant
    Filed: February 6, 2020
    Date of Patent: September 19, 2023
    Assignee: LICENSE BIOTECHNOLOGY Co., Ltd.
    Inventors: Wen-Cheng Huang, Szu-Meng Wu
  • Patent number: D1000250
    Type: Grant
    Filed: December 17, 2021
    Date of Patent: October 3, 2023
    Assignee: Sinox Lock (Kunshan) Co., Ltd.
    Inventor: Wen-Cheng Huang