Patents by Inventor Wen-Cheng Lien

Wen-Cheng Lien has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11823919
    Abstract: A multi-shield plate includes a plurality of windows and a plurality of vapor shields mounted to the plurality of windows, wherein each window of the plurality of windows is formed in the plate and extends through an entirety of the plate in a thickness direction. The multi-shield plate further includes a plurality of apertures in the plate, wherein each of the plurality of apertures extends through the entirety of the plate in the thickness direction and, an aperture of the plurality of apertures is aligned with a corresponding window of the plurality of windows along radius of the multi-shield plate.
    Type: Grant
    Filed: July 13, 2022
    Date of Patent: November 21, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Ping-Tse Lin, Wen-Cheng Lien, Chun-Chih Lin, Monica Ho
  • Publication number: 20220351990
    Abstract: A multi-shield plate includes a plurality of windows and a plurality of vapor shields mounted to the plurality of windows, wherein each window of the plurality of windows is formed in the plate and extends through an entirety of the plate in a thickness direction. The multi-shield plate further includes a plurality of apertures in the plate, wherein each of the plurality of apertures extends through the entirety of the plate in the thickness direction and, an aperture of the plurality of apertures is aligned with a corresponding window of the plurality of windows along radius of the multi-shield plate.
    Type: Application
    Filed: July 13, 2022
    Publication date: November 3, 2022
    Inventors: Ping-Tse LIN, Wen-Cheng LIEN, Chun-Chih LIN, Monica HO
  • Patent number: 11398393
    Abstract: A multi-shield plate includes a plate having a substantially flat upper surface and a substantially flat lower surface, a plurality of first windows formed in the plate and extending through the plate from the upper surface to the lower surface, and a plurality of vapor shields mounted to the plate, each vapor shield of the plurality of vapor shields configured to prevent passage of a vapor through a corresponding window of the plurality of windows. The multi-shield plate includes an aperture formed in the plate, the aperture aligned with a first window of the plurality of windows along an axis corresponding to the upper surface.
    Type: Grant
    Filed: October 19, 2020
    Date of Patent: July 26, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Ping-Tse Lin, Chun-Chih Lin, Wen-Cheng Lien, Monica Ho
  • Publication number: 20210035829
    Abstract: A multi-shield plate includes a plate having a substantially flat upper surface and a substantially flat lower surface, a plurality of first windows formed in the plate and extending through the plate from the upper surface to the lower surface, and a plurality of vapor shields mounted to the plate, each vapor shield of the plurality of vapor shields configured to prevent passage of a vapor through a corresponding window of the plurality of windows. The multi-shield plate includes an aperture formed in the plate, the aperture aligned with a first window of the plurality of windows along an axis corresponding to the upper surface.
    Type: Application
    Filed: October 19, 2020
    Publication date: February 4, 2021
    Inventors: Ping-Tse LIN, Chun-Chih LIN, Wen-Cheng LIEN, Monica HO
  • Patent number: 10811285
    Abstract: A multi-shield plate includes a plate having a substantially flat upper surface and a substantially flat lower surface, a plurality of first windows formed in the plate and extending through the plate from the upper surface to the lower surface, and a plurality of vapor shields mounted to the plate, each vapor shield of the plurality of vapor shields configured to prevent passage of a vapor through a corresponding window of the plurality of windows. The multi-shield plate includes an aperture formed in the plate, the aperture aligned with a first window of the plurality of windows along an axis corresponding to the upper surface.
    Type: Grant
    Filed: October 31, 2017
    Date of Patent: October 20, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Ping-Tse Lin, Chun-Chih Lin, Wen-Cheng Lien, Monica Ho
  • Publication number: 20180350640
    Abstract: A multi-shield plate includes a plate having a substantially flat upper surface and a substantially flat lower surface, a plurality of first windows formed in the plate and extending through the plate from the upper surface to the lower surface, and a plurality of vapor shields mounted to the plate, each vapor shield of the plurality of vapor shields configured to prevent passage of a vapor through a corresponding window of the plurality of windows. The multi-shield plate includes an aperture formed in the plate, the aperture aligned with a first window of the plurality of windows along an axis corresponding to the upper surface.
    Type: Application
    Filed: October 31, 2017
    Publication date: December 6, 2018
    Inventors: Ping-Tse LIN, Chun-Chih LIN, Wen-Cheng LIEN, Monica HO
  • Patent number: 9687885
    Abstract: Methods for cleaning a wafer in semiconductor fabrication are provided. The method includes providing a wafer. The method further includes cleaning the wafer in a first cleaning cycle by supplying a cleaning solution and supplying a first washing liquid mixed with a purge gas in sequence. The method also includes cleaning the wafer in a second cleaning cycle by supplying the cleaning solution and a second washing liquid mixed with the purge gas in sequence. The second cleaning cycle is initiated after the first cleaning cycle is finished.
    Type: Grant
    Filed: July 17, 2015
    Date of Patent: June 27, 2017
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Ying-Jie Cai, Bo-Wei Chou, Shih-Hsing Kao, Shin-Hsien Yang, Tzu-Min Lee, Tai-Yung Yu, Wen-Cheng Lien
  • Publication number: 20170014871
    Abstract: Methods for cleaning a wafer in semiconductor fabrication are provided. The method includes providing a wafer. The method further includes cleaning the wafer in a first cleaning cycle by supplying a cleaning solution and supplying a first washing liquid mixed with a purge gas in sequence. The method also includes cleaning the wafer in a second cleaning cycle by supplying the cleaning solution and a second washing liquid mixed with the purge gas in sequence. The second cleaning cycle is initiated after the first cleaning cycle is finished.
    Type: Application
    Filed: July 17, 2015
    Publication date: January 19, 2017
    Inventors: Ying-Jie CAI, Bo-Wei CHOU, Shih-Hsing KAO, Shin-Hsien YANG, Tzu-Min LEE, Tai-Yung YU, Wen-Cheng LIEN
  • Publication number: 20100200180
    Abstract: The snow cover of the invention has a main shade with fastening elements located at the upper end to be anchored on the car roof and other fastening elements on a lower end to be anchored on the car hood. The snow cover includes two triangular pendent self-stretched flaps each fastens to a pendant to stretch the main shade smoothly to neatly cover the windshield. When car doors are opened, two pendent self-stretched flaps slide quickly inside the car doors due to pendant principle. After the card doors are closed, two pendent self-stretched flaps are clamped by the car doors and the car body and held inside the car body. To move the snow cover, open the car doors, unfasten fastening elements at the upper and lower ends of the main shade, then the snow cover can be removed and stowed.
    Type: Application
    Filed: February 11, 2009
    Publication date: August 12, 2010
    Inventor: Wen-Cheng LIEN
  • Patent number: 7497602
    Abstract: A three dimension collapsible lampshade mainly includes a collapsible rib foldable on a cubical surface and a pliable fabric cover foldable on a plane. The pliable fabric cover has a flexible ring at a lower rim that may be fixed or folded in a desired shape. The collapsible rib and the pliable fabric cover are separable. By coupling the collapsible rib and the pliable fabric cover a cubical lampshade can be formed. The lampshade may also be folded in three dimensions. Compared with the conventional lampshades that are foldable only in two dimensions, the invention can save the cost of package material and transportation. The separable design also allows consumers to change and replace the pliable fabric cover as desired after purchase.
    Type: Grant
    Filed: February 8, 2007
    Date of Patent: March 3, 2009
    Inventor: Wen-Cheng Lien
  • Publication number: 20080192486
    Abstract: A three dimension collapsible lampshade mainly includes a collapsible rib foldable on a cubical surface and a pliable fabric cover foldable on a plane. The pliable fabric cover has a flexible ring at a lower rim that may be fixed or folded in a desired shape. The collapsible rib and the pliable fabric cover are separable. By coupling the collapsible rib and the pliable fabric cover a cubical lampshade can be formed. The lampshade may also be folded in three dimensions. Compared with the conventional lampshades that are foldable only in two dimensions, the invention can save the cost of package material and transportation. The separable design also allows consumers to change and replace the pliable fabric cover as desired after purchase.
    Type: Application
    Filed: February 8, 2007
    Publication date: August 14, 2008
    Inventor: Wen-Cheng Lien
  • Patent number: 7026171
    Abstract: A rapid thermal annealing (“RTA”) process providing for an RTA equipment is disclosed. The RTA equipment has a pyrometer providing for measuring an operation parameter, e.g., a temperature of the RTA process. The RTA process comprises steps of proceeding a first RTA step to a wafer in the RTA equipment, then comparing a measured value of the operation parameter with a reference range of value of the operation parameter, thereafter proceeding a second RTA step to the wafer in the RTA equipment when the measured value of the operation parameter is in between the reference range of value of the operation parameter. When the measured value of the operation parameter is out of the reference range of value of the operation parameter, the RTA equipment is turned off, and the wafer is unloaded from the RTA equipment and loaded into another RTA equipment to complete the RTA process.
    Type: Grant
    Filed: July 4, 2003
    Date of Patent: April 11, 2006
    Assignee: Macronix International Co., Ltd.
    Inventors: Y. Y. Chang, Shih-Liang Chou, L. H. Lee, Tsung-De Lin, Kou-Yow Tseng, Wen-Cheng Lien
  • Patent number: 6828208
    Abstract: A method of fabricating a shallow trench isolation (STI) structure. A substrate is provided and then a pad oxide layer, a mask layer and a first trench are sequentially formed on the substrate. An insulation layer is formed inside the first trench and over the substrate. The insulation layer has a second trench in a location above the first trench. Thereafter, a conformal cap layer is formed over the insulation layer. The cap layer has a third trench in a location above the second trench. A reverse mask is formed over the cap layer covering the third trench. The cap layer and the insulation layer outside the reverse mask are removed to expose the upper surface of the mask layer. The reverse mask is removed and then the residual insulation layer outside the remaining cap layer and the trench are moved to expose the upper surface of the mask layer. Finally, the mask layer and the pad oxide layer are removed.
    Type: Grant
    Filed: January 28, 2003
    Date of Patent: December 7, 2004
    Assignee: Macronix International Co., Ltd.
    Inventors: Tsung-De Lin, Hsiao-Kang Wang, Tian-Jue Hong, Shih-Liang Chou, Wen-Cheng Lien
  • Publication number: 20040224538
    Abstract: A rapid thermal annealing (“RTA”) process providing for an RTA equipment is disclosed. The RTA equipment has a pyrometer providing for measuring an operation parameter, e.g., a temperature of the RTA process. The RTA process comprises steps of proceeding a first RTA step to a wafer in the RTA equipment, then comparing a measured value of the operation parameter with a reference range of value of the operation parameter, thereafter proceeding a second RTA step to the wafer in the RTA equipment when the measured value of the operation parameter is in between the reference range of value of the operation parameter. When the measured value of the operation parameter is out of the reference range of value of the operation parameter, the RTA equipment is turned off, and the wafer is unloaded from the RTA equipment and loaded into another RTA equipment to complete the RTA process.
    Type: Application
    Filed: July 4, 2003
    Publication date: November 11, 2004
    Inventors: Y. Y. Chang, Shih-Liang Chou, L. H. Lee, Tsung-De Lin, Kou-Yow Tseng, Wen-Cheng Lien
  • Publication number: 20040147135
    Abstract: A method of fabricating a shallow trench isolation (STI) structure. A substrate is provided and then a pad oxide layer, a mask layer and a first trench are sequentially formed on the substrate. An insulation layer is formed inside the first trench and over the substrate. The insulation layer has a second trench in a location above the first trench. Thereafter, a conformal cap layer is formed over the insulation layer. The cap layer has a third trench in a location above the second trench. A reverse mask is formed over the cap layer covering the third trench. The cap layer and the insulation layer outside the reverse mask are removed to expose the upper surface of the mask layer. The reverse mask is removed and then the residual insulation layer outside the remaining cap layer and the trench are moved to expose the upper surface of the mask layer. Finally, the mask layer and the pad oxide layer are removed.
    Type: Application
    Filed: January 28, 2003
    Publication date: July 29, 2004
    Inventors: Tsung-De Lin, Hsiao-Kang Wang, Tian-Jue Hong, Shih-Liang Chou, Wen-Cheng Lien
  • Publication number: 20040146643
    Abstract: A method of determining the deposition temperature, especially inside the reaction chamber of a chemical vapor deposition station. The method includes placing a deposition substrate inside the reaction chamber, forming a layer of metal silicide over the deposition substrate, measuring the silicon/metal atomic ratio and finding the deposition temperature according to a pre-determined temperature versus silicon/metal atomic ratio relationship. The method permits immediate determination as well as real-time monitoring of deposition temperature inside the station.
    Type: Application
    Filed: January 24, 2003
    Publication date: July 29, 2004
    Inventors: Shih-Liang Chou, Tsung-Chin Wu, Tsung-De Lin, Tian-Jue Hong, Kou-Yow Tseng, Wen-Cheng Lien
  • Patent number: D665334
    Type: Grant
    Filed: December 20, 2011
    Date of Patent: August 14, 2012
    Assignee: Lucky Special Int'l Co., Ltd.
    Inventor: Wen-Cheng Lien