Patents by Inventor Wen-Chieh Tsou
Wen-Chieh Tsou has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20230059535Abstract: A complex sensing device packaging structure and packaging method are disclosed. The packaging structure includes a substrate disposed with a light emitting element and a light sensing chip. A first non-transparent material is disposed on the light sensing chip. A transparent molding material surrounds the light emitting element, the light sensing chip and the first non-transparent material.Type: ApplicationFiled: October 7, 2022Publication date: February 23, 2023Inventors: WEN-CHIEH TSOU, YI-HUA CHANG
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Publication number: 20220140172Abstract: A light sensing packaging structure and a packaging method thereof is provided, wherein the light sensing packaging structure comprises a substrate provided with a through-hole between a light-emitting element and a light-sensing element; and a cover body covered the substrate. The cover body comprises a shielding part and an extended part. The shielding part is mounted between the light-emitting element and the light-sensing element, and provided with a metal bonding layer on a surface towards the substrate. The extended part is provided with a metal side wall connected to the metal bonding layer. The through-hole is covered with a conductive glue, and the metal junction contacts the conductive glue. Hereby, the present application may reduce the size of the light sensing device, provide a stable packaging, reduce the packaging cost and improve the reliability of the light sensing product.Type: ApplicationFiled: March 25, 2021Publication date: May 5, 2022Inventors: WEN-CHIEH TSOU, YI-HUA CHANG
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Patent number: 11056607Abstract: A complex sensing device packaging structure includes a light emitting element sealed in a first transparent molding material, a light sensing element sealed in a second transparent molding material, a substrate disposed with the light emission element, the light sensing element, the first transparent molding material and the second transparent molding material, and an opaque blocking element disposed on the substrate and between the first transparent molding material and the second transparent molding material, wherein the opaque blocking element is formed by performing a solidifying process to an opaque glue being liquid at the room temperature.Type: GrantFiled: July 16, 2019Date of Patent: July 6, 2021Assignee: SensorTek technology Corp.Inventors: Wen-Chieh Tsou, Yi-Hua Chang, Chih-Wei Chen
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Publication number: 20200044112Abstract: A complex sensing device packaging structure includes a light emitting element sealed in a first transparent molding material, a light sensing element sealed in a second transparent molding material, a substrate disposed with the light emission element, the light sensing element, the first transparent molding material and the second transparent molding material, and an opaque blocking element disposed on the substrate and between the first transparent molding material and the second transparent molding material, wherein the opaque blocking element is formed by performing a solidifying process to an opaque glue being liquid at the room temperature.Type: ApplicationFiled: July 16, 2019Publication date: February 6, 2020Inventors: Wen-Chieh Tsou, Yi-Hua Chang, Chih-Wei Chen
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Patent number: 10161033Abstract: A cleaning module adapted for cleaning a load port of a processing apparatus in semiconductor fabrication is provided. The cleaning module includes a housing having at least one opening formed on a bottom wall panel of the housing. The cleaning module further includes a filter unit positioned in the housing. The leaning module also includes a driving assembly. The driving assembly is arranged to correspond to the opening and positioned in the housing. The driving assembly is used to create an air flow from outside of the housing via the opening to the filter unit. The filter unit is used to separate particles or contaminants from the air flow.Type: GrantFiled: August 21, 2015Date of Patent: December 25, 2018Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Hsueh-Lei Wang, Jen-Ti Wang, Ting-Wei Wang, Wen-Chieh Tsou
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Patent number: 9772563Abstract: At least a first reticle is stored in a housing of a stocker. A first gas is delivered to the housing. At least one reticle pod having an additional reticle is delivered into a enclosure within the housing of the stocker. A second gas different from the first gas is delivered to the enclosure. The reticle pod is automatically retrieved from the enclosure. The delivery and retrieval of the reticle pod and delivery of the first gas and the second gas are automatically controlled.Type: GrantFiled: June 27, 2013Date of Patent: September 26, 2017Assignee: Taiwan Semicondutor Manufacturing Co., Ltd.Inventors: Yung-Ho Chen, Wen-Chieh Tsou, Chih-Wei Huang, Wei-Cheng Wang
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Publication number: 20170049284Abstract: A cleaning module adapted for cleaning a load port of a processing apparatus in semiconductor fabrication is provided. The cleaning module includes a housing having at least one opening formed on a bottom wall panel of the housing. The cleaning module further includes a filter unit positioned in the housing. The leaning module also includes a driving assembly. The driving assembly is arranged to correspond to the opening and positioned in the housing. The driving assembly is used to create an air flow from outside of the housing via the opening to the filter unit. The filter unit is used to separate particles or contaminants from the air flow.Type: ApplicationFiled: August 21, 2015Publication date: February 23, 2017Inventors: Hsueh-Lei WANG, Jen-Ti WANG, Ting-Wei WANG, Wen-Chieh TSOU
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Patent number: 8928837Abstract: A circuit substrate including a base layer and a plurality of lead units arranged as an array is provided, wherein the base layer has a plurality of through grooves, and the lead units are disposed on the base layer. Each of the lead units includes a common terminal and at least three leads. The common terminal is capable of being divided into a plurality of electrodes connected with each other. The leads are extended outwards from the edge of the common terminal, and each of the leads is extended outwards from the edge of one of the electrodes. The through grooves expose the common terminals of the lead units.Type: GrantFiled: August 30, 2011Date of Patent: January 6, 2015Assignee: Everlight Electronics Co., Ltd.Inventor: Wen-Chieh Tsou
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Patent number: 8879023Abstract: A circuit substrate including a base layer and a plurality of lead units arranged as an array is provided, wherein the base layer has a plurality of through grooves, and the lead units are disposed on the base layer. Each of the lead units includes a common terminal and at least three leads. The common terminal is capable of being divided into a plurality of electrodes connected with each other. The leads are extended outwards from the edge of the common terminal, and each of the leads is extended outwards from the edge of one of the electrodes. The through grooves expose the common terminals of the lead units.Type: GrantFiled: February 11, 2009Date of Patent: November 4, 2014Assignee: Everlight Electronics Co., Ltd.Inventor: Wen-Chieh Tsou
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Publication number: 20130286365Abstract: At least a first reticle is stored in a housing of a stocker. A first gas is delivered to the housing. At least one reticle pod having an additional reticle is delivered into a enclosure within the housing of the stocker. A second gas different from the first gas is delivered to the enclosure. The reticle pod is automatically retrieved from the enclosure. The delivery and retrieval of the reticle pod and delivery of the first gas and the second gas are automatically controlled.Type: ApplicationFiled: June 27, 2013Publication date: October 31, 2013Inventors: Yung-Ho CHEN, Wen-Chieh TSOU, Chih-Wei HUANG, Wei-Cheng WANG
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Patent number: 8513820Abstract: A chip package structure includes a substrate, chips and an elastic element. The substrate has a first surface, a second surface, a first patterned metal layer on the first surface and a second patterned metal layer on the second surface, wherein the substrate is suitable for being clipped between an upper mold chase and a lower mold chase of a package mold. The chips are disposed on the first surface, wherein the chips are suitable for being contained in containing spaces defined by the upper mold chase and the substrate. The elastic element is disposed on the second surface and surrounds the second patterned metal layer, wherein the elastic element is suitable for contacting the lower mold chase and is located between the lower mold chase and the substrate. In addition, a manufacturing process of the chip package and a package substrate structure are also provided.Type: GrantFiled: January 21, 2010Date of Patent: August 20, 2013Assignee: Everlight Electronics Co., Ltd.Inventor: Wen-Chieh Tsou
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Patent number: 8492283Abstract: At least a first reticle is stored in a housing of a stocker. A first gas is delivered to the housing. At least one reticle pod having an additional reticle is delivered into a enclosure within the housing of the stocker. A second gas different from the first gas is delivered to the enclosure. The reticle pod is automatically retrieved from the enclosure. The delivery and retrieval of the reticle pod and delivery of the first gas and the second gas are automatically controlled.Type: GrantFiled: January 18, 2008Date of Patent: July 23, 2013Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Yung-Ho Chen, Wen-Chieh Tsou, Chih-Wei Huang, Wei-Cheng Wang
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Patent number: 8283790Abstract: An electronic device includes a carrier, a surface mounting device, and solders. The carrier has a plurality of bonding pads, and at least one of the bonding pads has a notch, such that the bonding pad has a necking portion adjacent to the notch. The surface mounting device is disposed on the carrier. Besides, the surface mounting device has a plurality of leads, and each of the leads is connected to the necking portion of one of the bonding pads, respectively. The notch of each of the bonding pads is located under one of the leads. The solders connect the bonding pads and the leads.Type: GrantFiled: January 21, 2010Date of Patent: October 9, 2012Assignee: Everlight Electronics Co., Ltd.Inventor: Wen-Chieh Tsou
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Publication number: 20110308851Abstract: A circuit substrate including a base layer and a plurality of lead units arranged as an array is provided, wherein the base layer has a plurality of through grooves, and the lead units are disposed on the base layer. Each of the lead units includes a common terminal and at least three leads. The common terminal is capable of being divided into a plurality of electrodes connected with each other. The leads are extended outwards from the edge of the common terminal, and each of the leads is extended outwards from the edge of one of the electrodes. The through grooves expose the common terminals of the lead units.Type: ApplicationFiled: August 30, 2011Publication date: December 22, 2011Applicants: EVERLIGHT ELECTRONICS CO., LTD., EVERLIGHT YI-GUANG TECHNOLOGY (SHANGHAI) LTD.Inventor: Wen-Chieh Tsou
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Patent number: 7772019Abstract: A method for packaging LED device comprises following steps: (1) A substrate with a cavity is provided; (2) A electrode layer is formed and located on the cavity and the surface of the substrate; (3) A opening through the cavity is formed, whereby a anode and a cathode are separated by the opening; (4) A LED chip is disposed on the bottom of the cavity and the opening, where the led chip is electrically connected to the anode and the cathode; (5) The cavity with the opening is filled with packaging material; (6) The packaging material is hardened, thereby the hardened packaging material with a recess that corresponding to the top of the chip; and (7) The LED device is formed by performing a cutting process along a cutting line in the cavity.Type: GrantFiled: December 12, 2008Date of Patent: August 10, 2010Assignee: Everlight Electronics Co., Ltd.Inventor: Wen-Chieh Tsou
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Publication number: 20100187674Abstract: A chip package structure includes a substrate, chips and an elastic element. The substrate has a first surface, a second surface, a first patterned metal layer on the first surface and a second patterned metal layer on the second surface, wherein the substrate is suitable for being clipped between an upper mold chase and a lower mold chase of a package mold. The chips are disposed on the first surface, wherein the chips are suitable for being contained in containing spaces defined by the upper mold chase and the substrate. The elastic element is disposed on the second surface and surrounds the second patterned metal layer, wherein the elastic element is suitable for contacting the lower mold chase and is located between the lower mold chase and the substrate. In addition, a manufacturing process of the chip package and a package substrate structure are also provided.Type: ApplicationFiled: January 21, 2010Publication date: July 29, 2010Applicant: EVERLIGHT ELECTRONICS CO., LTD.Inventor: Wen-Chieh Tsou
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Publication number: 20100187561Abstract: An electronic device includes a carrier, a surface mounting device, and solders. The carrier has a plurality of bonding pads, and at least one of the bonding pads has a notch, such that the bonding pad has a necking portion adjacent to the notch. The surface mounting device is disposed on the carrier. Besides, the surface mounting device has a plurality of leads, and each of the leads is connected to the necking portion of one of the bonding pads, respectively. The notch of each of the bonding pads is located under one of the leads. The solders connect the bonding pads and the leads.Type: ApplicationFiled: January 21, 2010Publication date: July 29, 2010Applicant: EVERLIGHT ELECTRONICS CO., LTD.Inventor: Wen-Chieh Tsou
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Publication number: 20090283790Abstract: A circuit substrate including a base layer and a plurality of lead units arranged as an array is provided, wherein the base layer has a plurality of through grooves, and the lead units are disposed on the base layer. Each of the lead units includes a common terminal and at least three leads. The common terminal is capable of being divided into a plurality of electrodes connected with each other. The leads are extended outwards from the edge of the common terminal, and each of the leads is extended outwards from the edge of one of the electrodes. The through grooves expose the common terminals of the lead units.Type: ApplicationFiled: February 11, 2009Publication date: November 19, 2009Applicant: EVERLIGHT ELECTRONICS CO., LTD.Inventor: Wen-Chieh Tsou
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Patent number: D628540Type: GrantFiled: January 29, 2010Date of Patent: December 7, 2010Assignee: Everlight Electronics Co., Ltd.Inventor: Wen-Chieh Tsou
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Patent number: D640644Type: GrantFiled: September 17, 2010Date of Patent: June 28, 2011Assignee: Everlight Electronics Co., Ltd.Inventor: Wen-Chieh Tsou