Abstract: An embedded circuit board made without gas bubbles or significant internal gaps according to a manufacturing method which is here disclosed comprises an inner layer assembly, an embedded element, and first and second insulating elements. The inner layer assembly comprises a first main portion with opposing first and second surfaces, a first groove not extending to the second surface is positioned at the first surface. A first opening penetrates the second surface, and the first opening and the first groove are connected. The first groove carries electronic elements for embedment. The first insulating element covers the first surface and a surface of the embedded element away from the second surface. The second insulating element covers the second surface and extends into the first opening to be in contact with the embedded element.

Abstract: The present disclosure is relates to a conductive film and a manufacturing method thereof. The conductive film includes a base layer, a TPU complex layer, a conductive layer and a TPU surface layer. The TPU complex layer includes a TPU heat-resistant layer and a TPU melting layer. The TPU heat-resistant layer is disposed on the TPU melting layer, and the TPU melting layer is disposed on the base layer. The conductive layer includes a conductive circuit disposed on the TPU heat-resistant layer. The TPU surface layer is disposed on the conductive layer. Utilizing the TPU complex layer, the conductive layer does not contact directly with the base layer to avoid breaking the conductive line of the conductive layer when the base layer is pulled. Therefore, the lifetime of the conductive film can be increased.

Abstract: A power supply unit supplies power to a load, and the power supply unit includes a power factor corrector, a DC conversion module, and an isolated conversion module. The power factor corrector is plugged into a first main circuit board and converts an AC power into a DC power. The DC conversion module is plugged into the first main circuit board and converts the DC power into a main power. The isolated conversion module includes a bus capacitor, the bus capacitor is coupled to the DC conversion module through a first power copper bar, and coupled to the power factor corrector through a second power copper bar. The first power copper bar and the second power copper bar are arranged on a side opposite to the first main circuit board, and are arranged in parallel with the first main circuit board.

Abstract: A method for estimating a flight time of a hydrogen fuel cell UAV (unmanned aerial vehicle) includes multiple steps performed by a controller: obtaining an internal pressure of a hydrogen tank by a pressure sensor installed on the hydrogen tank, calculating a remaining hydrogen volume according to the internal pressure and a capacity of the hydrogen tank, obtaining a reaction current value of the fuel cell, calculating a first hydrogen consumption rate according to the reaction current value, the number of a set of membrane electrodes connected in series and a Faraday constant, obtaining a second hydrogen consumption rate of a purge operation of an anode of the full cell; obtaining a hydrogen leakage rate of a stack of the fuel cell, and calculating the flight time according to the remaining hydrogen volume, the first hydrogen consumption rate, the second hydrogen consumption rate and the hydrogen leakage rate.

Abstract: A method includes forming a first fin and a second fin protruding from a frontside of a substrate, forming a gate stack over the first and second fins, forming a dielectric feature dividing the gate stack into a first segment engaging the first fin and a second segment engaging the second fin, and growing a first epitaxial feature on the first fin and a second epitaxial feature on the second fin. The dielectric feature is disposed between the first and second epitaxial features. The method also includes performing an etching process on a backside of the substrate to form a backside trench, and forming a backside via in the backside trench. The backside trench exposes the dielectric feature and the first and second epitaxial features. The backside via straddles the dielectric feature and is in electrical connection with the first and second epitaxial features.

Abstract: A data processing circuit and a fault-mitigating method are provided. In the method, multiple sub-sequences are divided from sequence data. A first sub-sequence of the sub-sequences is accessed from a memory for a multiply-accumulate (MAC) operation to obtain a first computed result. The MAC operation is performed on a second sub-sequence of the sub-sequences in the memory to obtain a second computed result. The first and the second computed results are combined, where the combined result of the first and the second computed results is related to the result of the MAC operation on the sequence data directly. Accordingly, the error rate could be reduced, so as to mitigate fault.

Abstract: A biological particle enrichment apparatus and a pico-droplet generator thereof are provided. The pico-droplet generator includes a container, a hollow needle connected to the container, a first piezoelectric member disposed on the container, and a second piezoelectric member disposed on the hollow needle. The container can receive a liquid specimen having biological particles. The hollow needle and the container are fluid communicated with each other, and an inner diameter of the container is within a range from 5 times to 30 times of an inner diameter of the hollow needle. The first piezoelectric member is annularly disposed on a surrounding lateral side of the container, and enables the biological particles in the container to move along a direction away from the surrounding lateral side by vibrating the container. The second piezoelectric member can squeeze the hollow needle, so that the liquid specimen flows outwardly to form a pico-droplet.

Abstract: A biological particle analysis method is provided and includes the following steps: fluorescence staining a liquid specimen through a fluorescence staining process so as to enable a target biological particle in the liquid specimen to becomes a fluorescence; accommodating the liquid specimen into a pico-droplet generator and using a camera device to take a real-time image of the liquid specimen; using the pico-droplet generator to output a target pico-droplet having the target biological particle onto a biochip according to the real-time image; removing the fluorescent color of the target biological particle in the target pico-droplet through a washing process; and fluorescence staining the target biological particle captured by the biochip at multiple times through the fluorescence staining process and the washing process, so as to obtain a plurality of fluorescence images respectively corresponding to multiple kinds of biological characterization expressions.

Abstract: The present disclosure relates to utilizing a firmware configuration system to efficiently update a firmware profile configuration of computing devices (e.g., host devices in a datacenter). For example, the firmware configuration system facilitates updating the firmware profile configuration, such as for a Unified Extensible Firmware Interface (UEFI) profile and/or a Basic Input/Output System (BIOS), without needing to develop, deploy, and install a new BIOS. More specifically, the firmware configuration system updates (e.g., via a baseband management controller) firmware profile configurations by modifying a profile configuration table in flash memory (i.e., on an SPI flash-based chip) of a BIOS with a firmware profile configuration update patch and without affecting other parts of the BIOS.

Abstract: Provided is a pharmaceutical composition including gastrodin and a use thereof for the prevention or the treatment of amyotrophic lateral sclerosis. The pharmaceutical composition is effective in reducing neuronal axon degeneration and neurofibromin accumulation, improving symptoms of amyotrophic lateral sclerosis and extending life of patients of amyotrophic lateral sclerosis.

Abstract: A memory device, includes a memory array for storing a plurality of vector data each of which has an MSB vector and a LSB vector. The memory array includes a plurality of memory units each of which has a first bit and a second bit. The first bit is used to store the MSB vector of each vector data, the second bit is used to store the LSB vector of each vector data. A bit line corresponding to each vector data executes one time of bit-line-setup, and reads the MSB vector and the LSB vector of each vector data according to the bit line. The threshold voltage distribution of each memory unit is divided into N states, where N is a positive integer and N is less than 2 to the power of 2, and the effective bit number stored by each memory unit is less than 2.

Abstract: An embedded circuit board, made without gas bubbles or significant internal gaps according to a manufacturing method which is provided, includes an inner layer assembly, an embedded element, and first and second insulating elements. The inner layer assembly comprises a first main portion with opposing first and second surfaces and a first groove not extending to the second surface is positioned at the first surface. A first opening penetrates the second surface, and the first opening and the first groove are connected. The first groove carries electronic elements for embedment. The first insulating element covers the first surface and a surface of the embedded element away from the second surface. The second insulating element covers the second surface and extends into the first opening to be in contact with the embedded element.

Abstract: A housing structure including a first housing and a second housing is provided. The first housing includes a first body and at least one metal fixing part protruding from the first body. The second housing includes a second body and at least one receiving part. The at least one metal fixing part leans against the at least one receiving part in a bent manner, such that the first housing is fixed on the second housing.

Abstract: The present invention relates to a composition comprising an amino acid-modified polymer, a carboxypolysaccharide, and may further include a metal ion for anti-adhesion and vector application. More specifically, the invention relates to a thermosensitive composition having enhanced mechanical and improved water-erosion resistant properties for efficiently preventing tissue adhesions and can serve as a vector with bio-compatible, bio-degradable/absorbable, and in-vivo sustainable properties.

Abstract: Synthetic amino acid-modified polymers and methods of making the same and using the same are disclosed. The synthetic amino acid-modified polymers possess distinct thermosensitive, improved water-erosion resistant, and enhanced mechanical properties, and are suitable of reducing or preventing formation of postoperative tissue adhesions. Additionally, the amino acid-modified polymers can also be used as a vector to deliver pharmaceutically active agents.

Abstract: Disclosed herein is a light transmissive fiber integrated knit textile for use on consumer electronic products. The knit textile is depicted to be constructed with light transmissive fibers integration through a weave-in/inlay knit technique with a flat-bed knitting construction. The light transmissive knitted textile is also tethered to a portable electronic device, allowing for the light transmitting fibers knitted into the fabric to define a lighting display on said fabric.

Abstract: A method of process technology assessment is provided. The method includes: defining a scope of the process technology assessment, the scope comprising an original process technology and a first process technology; modeling a first object in an integrated circuit into a resistance domain and a capacitance domain; generating a first resistance scaling factor and a first capacitance scaling factor based on the modeling, the original process technology, and the first process technology; and utilizing, by an electronic design automation (EDA) tool, the first resistance scaling factor and the first capacitance scaling factor for simulation of the integrated circuit.

Abstract: A semiconductor device includes a substrate and a gate structure. The gate structure is disposed on the substrate, and the gate structure includes a titanium nitride barrier layer a titanium aluminide layer, and a middle layer. The titanium aluminide layer is disposed on the titanium nitride barrier layer, and the middle layer is disposed between the titanium aluminide layer and the titanium nitride barrier layer. The middle layer is directly connected with the titanium aluminide layer and the titanium nitride barrier layer, and the middle layer includes titanium and nitrogen. A concentration of nitrogen in the middle layer is gradually decreased in a vertical direction towards an interface between the middle layer and the titanium aluminide layer.

Abstract: Disclosed herein is a glass composition including, based on a total weight of the glass composition, 49 wt % to 59 wt % of SiO2, 9.5 wt % to 14.5 wt % of Al2O3, 19 wt % to 35 wt % of B2O3, 2 wt % to 5 wt % of CaO, 0.25 wt % to 3 wt % of ZnO, 0 wt % to 1 wt % of MgO, 0 wt % to 1 wt % of TiO2, 0 wt % to 3 wt % of ZrO2, and 0.1 wt % to 3.5 wt % of MnO. Also disclosed herein are a glass fiber and a glass article which include the glass composition.

Abstract: Disclosed herein is a glass composition that includes, based on a total weight of the glass composition, 55 wt % to 64 wt % of SiO2, 15 wt % to 22 wt % of Al2O3, 0.1 wt % to 4 wt % of CaO, 2.1 wt % to 10 wt % of MgO, 0 wt % to 8 wt % of ZnO, greater than 0 wt % and less than 7 wt % of CuO, and greater than 13.1 wt % and less than 18 wt % of B2O3. Also disclosed herein are a glass fiber and a glass article including the glass composition.