Patents by Inventor Wen-Liang Huang
Wen-Liang Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11972984Abstract: A semiconductor device includes a fin-shaped structure on a substrate, a gate structure on the fin-shaped structure and an interlayer dielectric (ILD) layer around the gate structure, and a single diffusion break (SDB) structure in the ILD layer and the fin-shaped structure. Preferably, the SDB structure includes a bottom portion and a top portion on the bottom portion, in which the top portion and the bottom portion include different widths.Type: GrantFiled: December 26, 2022Date of Patent: April 30, 2024Assignee: UNITED MICROELECTRONICS CORP.Inventors: Ching-Ling Lin, Wen-An Liang, Chen-Ming Huang
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Publication number: 20240136423Abstract: A method for fabricating high electron mobility transistor (HEMT) includes the steps of: forming a buffer layer on a substrate; forming a first barrier layer on the buffer layer; forming a first hard mask on the first barrier layer; removing the first hard mask and the first barrier layer to form a recess; forming a second barrier layer in the recess; and forming a p-type semiconductor layer on the second barrier layer.Type: ApplicationFiled: December 25, 2023Publication date: April 25, 2024Applicant: UNITED MICROELECTRONICS CORP.Inventors: Chun-Ming Chang, Che-Hung Huang, Wen-Jung Liao, Chun-Liang Hou
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Publication number: 20240124350Abstract: A quantum dot composite structure and a method for forming the same are provided. The quantum dot composite structure includes: a glass particle including a glass matrix and a plurality of quantum dots located in the glass matrix, wherein at least one of the plurality of quantum dots includes an exposed surface in the glass matrix; and an inorganic protective layer disposed on the glass particle and covering the exposed surface.Type: ApplicationFiled: October 13, 2023Publication date: April 18, 2024Inventors: Ching LIU, Wen-Tse HUANG, Ru-Shi LIU, Pei Cong YAN, Chai-Chun HSIEH, Hung-Chun TONG, Yu-Chun LEE, Tzong-Liang TSAI
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Publication number: 20240128353Abstract: A method for fabricating high electron mobility transistor (HEMT) includes the steps of: forming a buffer layer on a substrate; forming a first barrier layer on the buffer layer; forming a first hard mask on the first barrier layer; removing the first hard mask and the first barrier layer to form a recess; forming a second barrier layer in the recess; and forming a p-type semiconductor layer on the second barrier layer.Type: ApplicationFiled: December 25, 2023Publication date: April 18, 2024Applicant: UNITED MICROELECTRONICS CORP.Inventors: Chun-Ming Chang, Che-Hung Huang, Wen-Jung Liao, Chun-Liang Hou
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Publication number: 20240112943Abstract: A die suction assistance device is provided to a wafer. The wafer is diced into multiple dies, and a tape is taped on a bottom side of the wafer. The die suction assistance device includes a platform and multiple support structures mounted in the platform. Multiple air ducts are formed among adjacent support structures. When the wafer is air-tightly mounted on the platform, the wafer is supported by the support structures. When an external vacuum device vacuums air out of the platform, a vacuum environment with negative pressure is created in the air ducts. This allows the tape to partially separate from a backside of each of the dies towards the air ducts, and allows the dies to be picked up respectively by a suction nozzle with less chance of being damaged, securing integrities of dies.Type: ApplicationFiled: November 8, 2022Publication date: April 4, 2024Applicant: PANJIT INTERNATIONAL INC.Inventors: Chung-Hsiung HO, Chi-Hsueh LI, Wen-Liang HUANG
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Patent number: 11945885Abstract: A vinyl-containing copolymer is copolymerized from (a) first compound, (b) second compound, and (c) third compound. (a) First compound is an aromatic compound having a single vinyl group. (b) Second compound is polybutadiene or polybutadiene-styrene having side vinyl groups. (c) Third compound is an acrylate compound. The vinyl-containing copolymer includes 0.003 mol/g to 0.010 mol/g of benzene ring, 0.0005 mol/g to 0.008 mol/g of vinyl group, and 1.2*10?5 mol/g to 2.4*10?4 mol/g of ester group.Type: GrantFiled: December 29, 2022Date of Patent: April 2, 2024Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTEInventors: Cheng-Po Kuo, Shin-Liang Kuo, Shu-Chuan Huang, Yan-Ting Jiang, Jian-Yi Hang, Wen-Sheng Chang
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Publication number: 20240094638Abstract: An optimization method for a mask pattern optical transfer includes steps as follows: First, a projection optical simulation is performed to obtain an optimal pupil configuration scheme corresponding to a virtual mask pattern. Next, a position scanning is performed to change the optimal pupil configuration scheme, so as to generate a plurality of adjusted pupil configuration schemes. A mask pattern transfer simulation is performed to obtain a plurality of pupil configuration schemes-critical dimension relationship data corresponding to the virtual mask pattern. Subsequently, an actual pupil configuration scheme suitable for an actual mask pattern is selected according to the plurality of pupil configuration schemes-critical dimension relationship data, and upon which an actual mask pattern transfer is performed.Type: ApplicationFiled: November 9, 2022Publication date: March 21, 2024Inventors: Chun-Yi CHANG, Wen-Liang HUANG
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Patent number: 11935947Abstract: An enhancement mode high electron mobility transistor (HEMT) includes a group III-V semiconductor body, a group III-V barrier layer and a gate structure. The group III-V barrier layer is disposed on the group III-V semiconductor body, and the gate structure is a stacked structure disposed on the group III-V barrier layer. The gate structure includes a gate dielectric and a group III-V gate layer disposed on the gate dielectric, and the thickness of the gate dielectric is between 15 nm to 25 nm.Type: GrantFiled: October 8, 2019Date of Patent: March 19, 2024Assignee: UNITED MICROELECTRONICS CORP.Inventors: Chih-Tung Yeh, Chun-Ming Chang, Bo-Rong Chen, Shin-Chuan Huang, Wen-Jung Liao, Chun-Liang Hou
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Publication number: 20240071965Abstract: A package includes a first package component including a semiconductor die, wherein the semiconductor die includes conductive pads, wherein the semiconductor die is surrounded by an encapsulant; an adaptive interconnect structure on the semiconductor die, wherein the adaptive interconnect structure includes conductive lines, wherein each conductive line physically and electrically contacts a respective conductive pad; and first bond pads, wherein each first bond pad physically and electrically contacts a respective conductive line; and a second package component including an interconnect structure, wherein the interconnect structure includes second bond pads, wherein each second bond pad is directly bonded to a respective first bond pad, wherein each second bond pad is laterally offset from a corresponding conductive pad which is electrically coupled to that second bond pad.Type: ApplicationFiled: August 29, 2022Publication date: February 29, 2024Inventors: Tung-Liang Shao, Yu-Sheng Huang, Wen-Hao Cheng, Chen-Hua Yu
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Publication number: 20230288769Abstract: Disclosed herein is a solid polymer electrolyte membrane prepared by subjecting an oligomer-containing composition to a polymerization reaction. The oligomer-containing composition includes ethoxylated multifunctional acrylate monomer, polyether amine oligomer, and a lithium salt. An electrochromic device including an anode, a cathode, and the solid polymer electrolyte membrane is also disclosed. The solid polymer electrolyte membrane is disposed between the anode and the cathode.Type: ApplicationFiled: September 27, 2022Publication date: September 14, 2023Applicant: Ming Chi University of TechnologyInventors: Wen-Liang HUANG, Chun-Chen YANG
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Publication number: 20220344228Abstract: The present invention includes a chip, a plastic film layer, and an electroplated layer. A front side and a back side of the chip each comprises a signal contact. The plastic film layer covers the chip and includes a first via and a second via. The first via is formed adjacent to the chip, and the second via is formed extending to the signal contact of the front side. A conductive layer is added in the first and the second via. The conductive layer in the second via is electrically connected to the signal contact of the front side. Through the electroplated layer, the signal contact on the back side is electrically connected to the conductive layer in the first via. The conductive layer protrudes from the plastic film layer as conductive terminals. The present invention achieves electrical connection of the chip without using expensive die bonding materials.Type: ApplicationFiled: December 7, 2021Publication date: October 27, 2022Inventors: Chung-Hsiung Ho, Wei-Ming Hung, Wen-Liang Huang, Shun-Chi Shen, Chien-Chun Wang, Chi-Hsueh Li
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Publication number: 20210387902Abstract: A method for making a beam splitter with photocatalytic coating is disclosed. First, a TiO2—SiO2 sol, a SiO2 sol, and an anatase TiO2 preform sol are prepared. A glass substrate having two opposite surfaces is provided. The two opposite surfaces of the glass substrate is coated with the TiO2—SiO2 sol, the SiO2 sol, and the anatase TiO2 preform sol by dip-coating, thereby forming a coated glass substrate with a multi-layer optical coating on each of the two opposite surfaces. The multi-layer optical coating comprises a TiO2—SiO2 coating, a SiO2 coating, and an anatase TiO2 preform coating. The coated glass substrate is subjected to an anneal process. The coated glass substrate is cut, thereby forming the beam splitter with photocatalytic coating.Type: ApplicationFiled: June 11, 2020Publication date: December 16, 2021Inventors: Wen-Liang Huang, Wei-Hong Wang, Zhen-Feng Wang, Wei-Houng Chen, Pei-Feng Sheu
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Patent number: 10916636Abstract: A method of forming gates includes the following steps. Dummy gates are formed on a substrate. A spacer material is deposited to conformally cover the dummy gates. A removing process is performed to remove parts of the spacer material and the dummy gates, thereby forming spacers and recesses in the spacers.Type: GrantFiled: February 15, 2019Date of Patent: February 9, 2021Assignee: UNITED MICROELECTRONICS CORP.Inventors: Po-Tsang Chen, Wen-Liang Huang, Chun-Chi Yu
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Publication number: 20200266285Abstract: A method of forming gates includes the following steps. Dummy gates are formed on a substrate. A spacer material is deposited to conformally cover the dummy gates. A removing process is performed to remove parts of the spacer material and the dummy gates, thereby forming spacers and recesses in the spacers.Type: ApplicationFiled: February 15, 2019Publication date: August 20, 2020Inventors: Po-Tsang Chen, Wen-Liang Huang, Chun-Chi Yu
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Publication number: 20180141854Abstract: The present invention provides a method of manufacturing a glass with anti-glare, strengthened, anti-microbial and anti-fingerprint capabilities. A glass substrate is provided with a target surface. Plural treatments are carried out, including: performing an anti-glare treatment upon the target surface by using a mixed acid solution; performing a strengthening treatment by using KNO3; performing an anti-microbial treatment by using a silver-containing fluid; and performing an anti-fingerprint treatment by forming a fluorocarbon siloxane layer on the target surface.Type: ApplicationFiled: November 15, 2017Publication date: May 24, 2018Inventor: Wen-Liang Huang
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Publication number: 20170144924Abstract: A method of manufacturing the glass substrate is provided. First, a glass substrate having a target surface is provided. Next, an abrasive blasting process for the target surface is performed. After the abrasive blasting process, an etching process for the target surface is performed. The present invention further provides a glass substrate having a target surface. The target surface has an average etching depth between 1 ?m and 100 ?m, a roughness (Ra) between 0.05 ?m and 1.5 ?m, and a friction below 0.4.Type: ApplicationFiled: February 2, 2017Publication date: May 25, 2017Inventor: Wen-Liang Huang
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Patent number: 9534803Abstract: An energy saving air conditioning system is disclosed which provides different air conditioning modes, including a closed-loop mode, an open-loop mode, and a partial-loop mode, for controlling the environment in a high-density apparatus room. The energy saving air conditioning system uses a cloud operating center to monitor the temperature and the moisture inside and outside the high-density apparatus room. The cloud operating system dynamically selects the air conditioning mode in such a manner that energy can be saved and the environment in the high-density apparatus room can be optimally managed.Type: GrantFiled: May 24, 2012Date of Patent: January 3, 2017Assignee: Quanta Computer Inc.Inventors: Chao-Jung Chen, Chien-Pang Chen, Kai-Hung Lin, Chih-Ming Chen, Wen-Liang Huang
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Patent number: 9506965Abstract: An overlay mark including at least one first overlay mark and at least one second overlay mark is provided. The first overlay mark includes a plurality of first bars and a plurality of first spaces arranged alternately, and the first spaces are not constant. The second overlay mark includes a plurality of second bars and a plurality of second spaces arranged alternately, and the second spaces are constant. Besides, the second overlay mark partially overlaps with the first overlay mark.Type: GrantFiled: November 12, 2012Date of Patent: November 29, 2016Assignee: United Microelectronics Corp.Inventors: Kuo-Chun Huang, Chien-Hao Chen, Wen-Liang Huang
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Patent number: 9304389Abstract: A photomask including first opaque patterns and second opaque patterns is provided. The first opaque patterns are distributed in a first plane defined in the photomask, while the second opaque patterns are disposed above the first opaque patterns and spaced apart from the first opaque patterns. In other words, the first opaque pattern and second opaque pattern are not distributed in the same plane.Type: GrantFiled: October 31, 2013Date of Patent: April 5, 2016Assignee: UNITED MICROELECTRONICS CORP.Inventors: En-Chiuan Liou, Sho-Shen Lee, Wen-Liang Huang, Chang-Mao Wang, Kai-Lin Chuang
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Patent number: 9136140Abstract: A patterning method is provided. First, a material layer is formed over a substrate. Thereafter, a plurality of directed self-assembly (DSA) patterns are formed on the material layer. Afterwards, a patterned photoresist layer is formed by using a single lithography process. The patterned photoresist layer covers a first portion of the DSA patterns and exposes a second portion of the DSA patterns. Further, the material layer is patterned by an etching process, using the patterned photoresist layer and the second portion of the DSA patterns as a mask.Type: GrantFiled: September 12, 2013Date of Patent: September 15, 2015Assignee: United Microelectronics Corp.Inventors: Wen-Liang Huang, Chia-Hung Lin, Chun-Chi Yu