Abstract: A device includes a first cell active area asymmetrically positioned in a first device column between a first barrier line and a second barrier line, a second cell active area asymmetrically positioned in a second device column between the first barrier line and a third barrier line, where the first cell has a first cell length in a first direction perpendicular to the first barrier line which is three times a second cell length in the first direction. The first cell active area and the second cell active area are a first distance from the first barrier line, and the first cell active area is a second distance from the second barrier line, and the second cell active area is the second distance away from the third barrier line.

Abstract: In an integrated circuit, the gates of a first high-threshold transistor and a first low-threshold transistor are connected together, and the gates of a second high-threshold transistor and a second low-threshold transistor are connected together. The drain of the first high-threshold transistor is conductively connected to the source of the first low-threshold transistor, and the drain of the second high-threshold transistor is conductively connected to the source of the second low-threshold transistor. The gates of the first low-threshold transistor and the second low-threshold transistor are conductively connected to the drain of the first low-threshold transistor. The threshold-voltage of the first high-threshold transistor is larger than a threshold-voltage of the first low-threshold transistor. The threshold-voltage of the second high-threshold transistor is larger than a threshold-voltage of the second low-threshold transistor.

Abstract: Various techniques are disclosed for automatically generating sub-cells for a non-final layout of an analog integrated circuit. Device specifications and partition information for the analog integrated circuit is received. Based on the device specifications and the partition information, first cut locations for a first set of cuts to be made along a first direction of a non-final layout of the analog integrated circuit and second cut locations for a second set of cuts to be made along a second direction in the non-final layout are determined. The first set of cuts are made in the non-final layout at the cut locations to produce a temporary layout. The second set of cuts are made in the temporary layout at the cut locations to produce a plurality of sub-cells.

Abstract: A light-effect producing candle for illuminating and generating altering light-effect includes a light-generating means located inside a transparent candle. The light-generating means includes a plurality of light-generating devices of different colors. An optical fiber is provided to receive and transmit photo signal generated by a lighted wick, and to activate the light-generating devices to produce flickering light which may emanate through the candle for producing flickering and altering light effect around the candle.