Patents by Inventor Wen-Yu Huang

Wen-Yu Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11665336
    Abstract: An estimation method suitable for a receiver and includes the following steps: calculating a relative signal-to-noise ratio, and determining whether the relative signal-to-noise ratio is higher than, lower than or within a threshold range; in response to determining that the relative signal-to-noise ratio is higher than the threshold range, estimating the signal quality indicator as a first preset value, wherein the first preset value represents a best signal quality; in response to determining that the relative signal-to-noise ratio is higher than the threshold range, estimating the signal quality indicator as a first preset value, wherein the first preset value represents a best signal quality; in response to determining that the relative signal-to-noise ratio is within the threshold range, estimating the signal quality indicator as an output value of a function according to a bit error rate, wherein an input value of the function is the relative signal-to-noise ratio.
    Type: Grant
    Filed: August 22, 2022
    Date of Patent: May 30, 2023
    Assignee: REALTEK SEMICONDUCTOR CORP.
    Inventors: Wen-Yu Huang, Hsin-Pei Lee
  • Publication number: 20230078628
    Abstract: An isolated converter includes an input circuit, a transformer, a first switch, a second switch and a snubber circuit. The input circuit includes at least two input capacitors, and is configured to provide an input voltage. A divider node is arranged between the at least two input capacitors. The transformer includes a primary winding and a secondary winding to generate an output voltage on the secondary winding according to the input voltage. The primary winding of the transformer is electrically connected between the first switch and the second switch. The snubber circuit is electrically connected between the first switch and the second switch, and forms a discharge path with the primary winding. The snubber circuit is configured to receive a reflected voltage from the secondary winding back to the primary winding, and the divider node is connected to the discharge path.
    Type: Application
    Filed: July 29, 2022
    Publication date: March 16, 2023
    Inventors: Wen-Yu HUANG, Shih-Hsun WANG, Hung-Chuan LIN
  • Patent number: 11600986
    Abstract: A safety shutdown apparatus with self-driven control is coupled to a power-supplying path between a power supply apparatus and a load. The safety shutdown apparatus includes a detection unit, a controllable switch, and a drive circuit. The detection unit is coupled to the power-supplying path, and the controllable switch is coupled between a positive node and a negative node of the power-supplying path. The drive circuit is coupled to the detection unit, the power-supplying path, and the controllable switch. The drive circuit receives an output voltage of the power supply apparatus to turn on the controllable switch, and turn off the controllable switch according to whether the detection unit detects a current flowing through the power-supplying path.
    Type: Grant
    Filed: February 3, 2021
    Date of Patent: March 7, 2023
    Assignee: DELTA ELECTRONICS, INC.
    Inventors: Lei-Ming Lee, Wen-Yu Huang, Xin-Hung Lin
  • Publication number: 20230058268
    Abstract: An estimation method suitable for a receiver and includes the following steps: calculating a relative signal-to-noise ratio, and determining whether the relative signal-to-noise ratio is higher than, lower than or within a threshold range; in response to determining that the relative signal-to-noise ratio is higher than the threshold range, estimating the signal quality indicator as a first preset value, wherein the first preset value represents a best signal quality; in response to determining that the relative signal-to-noise ratio is higher than the threshold range, estimating the signal quality indicator as a first preset value, wherein the first preset value represents a best signal quality; in response to determining that the relative signal-to-noise ratio is within the threshold range, estimating the signal quality indicator as an output value of a function according to a bit error rate, wherein an input value of the function is the relative signal-to-noise ratio.
    Type: Application
    Filed: August 22, 2022
    Publication date: February 23, 2023
    Inventors: WEN-YU HUANG, HSIN-PEI LEE
  • Publication number: 20220367102
    Abstract: A common mode choke is provided, including a hollow ferrite core, a plurality of coils wound around the ferrite core, and a substrate. Each of the coils has a first end and a second end. The substrate is disposed on the side of the ferrite core and has a plurality of through holes. The first and second ends of the coils are engaged in the through holes. When viewed along the central axis of the ferrite core, the first and second ends of the coils are located on the outer side the ferrite core.
    Type: Application
    Filed: July 15, 2021
    Publication date: November 17, 2022
    Inventors: Chia-Ming LIU, Wen-Yu HUANG, Lei REN, Rui-Guang LIU
  • Patent number: 11362589
    Abstract: A flying capacitor converter includes an inductor, a first switch and a second switch, a first diode and a second diode, a first capacitor and a second capacitor, a flying capacitor, a third diode and a third capacitor, a fourth diode, and a fifth diode. The inductor is coupled to a first node. The first switch and the second switch are commonly connected to a second node. The first diode and the second diode are commonly connected to a third node. The first capacitor and the second capacitor are commonly connected to a fourth node. The flying capacitor is coupled to the second node and the third node. The third diode and the third capacitor are commonly connected to a fifth node. The fifth diode is coupled to the third node and the fourth node.
    Type: Grant
    Filed: May 7, 2020
    Date of Patent: June 14, 2022
    Assignee: DELTA ELECTRONICS, INC.
    Inventors: Wen-Yu Huang, Wei-Lun Hsin, Xin-Hung Lin
  • Publication number: 20220115983
    Abstract: A step-up conversion module includes a first step-up circuit, a second step-up circuit, a first unidirectional conduction element, and a second unidirectional conduction element. The first step-up circuit includes a first input loop composed of a first inductor and a first switch unit. The second step-up circuit includes a second input loop composed of a second inductor and a second switch unit. The first inductor and the second inductor form a coupling inductor with a common core. The first unidirectional conduction element blocks a first reverse current induced by the coupling inductor to the first input loop. The second unidirectional conduction element blocks a second reverse current induced by the coupling inductor to the second input loop.
    Type: Application
    Filed: July 14, 2021
    Publication date: April 14, 2022
    Inventors: Wen-Yu HUANG, Xin-Hung LIN
  • Patent number: 11250849
    Abstract: A voice wake-up apparatus used in an electronic device that includes a voice activity detection circuit, a storage circuit and a smart detection circuit is provided. The voice activity detection circuit receives an input sound signal and detects a voice activity section of the input sound signal. The storage circuit stores a predetermined voice sample. The smart detection circuit receives the input sound signal to perform a time domain and a frequency domain detection on the voice activity section to generate a syllable and frequency characteristic detection result, compare the syllable and frequency characteristic detection result with the predetermined voice sample and generate a wake-up signal to a processing circuit of the electronic device when the syllable and frequency characteristic detection result matches the predetermined voice sample to wake up the processing circuit.
    Type: Grant
    Filed: October 24, 2019
    Date of Patent: February 15, 2022
    Assignee: REALTEK SEMICONDUCTOR CORPORATION
    Inventors: Chi-Te Wang, Wen-Yu Huang
  • Publication number: 20220045499
    Abstract: A safety shutdown apparatus with self-driven control is coupled to a power-supplying path between a power supply apparatus and a load. The safety shutdown apparatus includes a detection unit, a controllable switch, and a drive circuit. The detection unit is coupled to the power-supplying path, and the controllable switch is coupled between a positive node and a negative node of the power-supplying path. The drive circuit is coupled to the detection unit, the power-supplying path, and the controllable switch. The drive circuit receives an output voltage of the power supply apparatus to turn on the controllable switch, and turn off the controllable switch according to whether the detection unit detects a current flowing through the power-supplying path.
    Type: Application
    Filed: February 3, 2021
    Publication date: February 10, 2022
    Inventors: Lei-Ming LEE, Wen-Yu HUANG, Xin-Hung LIN
  • Publication number: 20220045598
    Abstract: A power supply system with self-excited drive function includes a power supply apparatus, a logic disconnection circuit, a self-boosting circuit, a protection circuit, and a current sensing unit. The logic disconnection circuit is coupled between a positive power wire and a negative power wire. The self-boosting circuit converts a voltage into an auxiliary voltage, and the self-boosting circuit is coupled to the logic disconnection circuit to receive the auxiliary voltage. The current sensing unit outputs a current sensing signal according to a current flowing through the positive power wire or the negative power wire. The protection circuit makes a short circuit or an open circuit between the positive power wire and the negative power wire according to the current sensing signal. The logic disconnection circuit disables or enables the self-boosting circuit according to the voltage between the positive power wire and the negative power wire.
    Type: Application
    Filed: February 3, 2021
    Publication date: February 10, 2022
    Inventors: Wen-Yu HUANG, Xin-Hung LIN
  • Patent number: 11062931
    Abstract: The present disclosure provides one embodiment of a semiconductor processing apparatus. The semiconductor processing apparatus includes a load lock designed to receive a wafer carrier; an inner wafer carrier buffer configured to hold the wafer carrier received from the load lock and to perform a nitrogen purge to the wafer carrier; and a processing module designed to perform a semiconductor process to wafers from the wafer.
    Type: Grant
    Filed: August 22, 2019
    Date of Patent: July 13, 2021
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Jason Shen, Wen-Yu Huang, Li-Jen Ko, Hsiang Yin Shen
  • Patent number: 10944616
    Abstract: The present invention provides a method for estimating a sampling frequency offset of a receiver supporting ATSC 3.0 standard is disclosed. The method includes the steps of: receiving a bootstrap signal comprising a plurality of symbols; performing an autocorrelation operation on a first symbol of the plurality of symbols to generate a first correlation result; performing the autocorrelation operation on a second symbol of the plurality of symbols to generate a second correlation result; and determining the sampling frequency offset according to the first correlation result and the second correlation result.
    Type: Grant
    Filed: March 24, 2020
    Date of Patent: March 9, 2021
    Assignee: Realtek Semiconductor Corp.
    Inventor: Wen-Yu Huang
  • Publication number: 20210067039
    Abstract: A flying capacitor converter includes an inductor, a first switch and a second switch, a first diode and a second diode, a first capacitor and a second capacitor, a flying capacitor, a third diode and a third capacitor, a fourth diode, and a fifth diode. The inductor is coupled to a first node. The first switch and the second switch are commonly connected to a second node. The first diode and the second diode are commonly connected to a third node. The first capacitor and the second capacitor are commonly connected to a fourth node. The flying capacitor is coupled to the second node and the third node. The third diode and the third capacitor are commonly connected to a fifth node. The fifth diode is coupled to the third node and the fourth node.
    Type: Application
    Filed: May 7, 2020
    Publication date: March 4, 2021
    Inventors: Wen-Yu HUANG, Wei-Lun HSIN, Xin-Hung LIN
  • Publication number: 20200219502
    Abstract: A voice wake-up apparatus used in an electronic device that includes a voice activity detection circuit, a storage circuit and a smart detection circuit is provided. The voice activity detection circuit receives an input sound signal and detects a voice activity section of the input sound signal. The storage circuit stores a predetermined voice sample. The smart detection circuit receives the input sound signal to perform a time domain and a frequency domain detection on the voice activity section to generate a syllable and frequency characteristic detection result, compare the syllable and frequency characteristic detection result with the predetermined voice sample and generate a wake-up signal to a processing circuit of the electronic device when the syllable and frequency characteristic detection result matches the predetermined voice sample to wake up the processing circuit.
    Type: Application
    Filed: October 24, 2019
    Publication date: July 9, 2020
    Inventors: Chi-Te Wang, Wen-Yu Huang
  • Publication number: 20190378736
    Abstract: The present disclosure provides one embodiment of a semiconductor processing apparatus. The semiconductor processing apparatus includes a load lock designed to receive a wafer carrier; an inner wafer carrier buffer configured to hold the wafer carrier received from the load lock and to perform a nitrogen purge to the wafer carrier; and a processing module designed to perform a semiconductor process to wafers from the wafer.
    Type: Application
    Filed: August 22, 2019
    Publication date: December 12, 2019
    Inventors: Jason Shen, Wen-Yu Huang, Li-Jen Ko, Hsiang Yin Shen
  • Patent number: 10403532
    Abstract: The present disclosure provides one embodiment of a semiconductor processing apparatus. The semiconductor processing apparatus includes a load lock designed to receive a wafer carrier; an inner wafer carrier buffer configured to hold the wafer carrier received from the load lock and to perform a nitrogen purge to the wafer carrier; and a processing module designed to perform a semiconductor process to wafers from the wafer.
    Type: Grant
    Filed: September 20, 2012
    Date of Patent: September 3, 2019
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Jason Shen, Wen-Yu Huang, Li-Jen Ko, Hsiang Yin Shen
  • Publication number: 20140075774
    Abstract: The present disclosure provides one embodiment of a semiconductor processing apparatus. The semiconductor processing apparatus includes a load lock designed to receive a wafer carrier; an inner wafer carrier buffer configured to hold the wafer carrier received from the load lock and to perform a nitrogen purge to the wafer carrier; and a processing module designed to perform a semiconductor process to wafers from the wafer.
    Type: Application
    Filed: September 20, 2012
    Publication date: March 20, 2014
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Jason Shen, Wen-Yu Huang, Li-Jen Ko, Hsiang Yin Shen
  • Patent number: 8374000
    Abstract: An interleaved flyback converter device with leakage energy recycling includes: two flyback converters and an input power. Each flyback converter includes a capacitor, a switch, two diodes, and a transformer. The input power is connected to the capacitors of the two flyback converters respectively. By using the capacitors as input voltage, the two flyback converters are provided with lower voltage rating. The diodes are used to recycle leakage energy directly, and to clamp voltage on power components. Therefore, in addition to enhancing efficiency via recycling leakage energy, the two flyback converters have lower switching losses due to lower switching voltage.
    Type: Grant
    Filed: February 15, 2011
    Date of Patent: February 12, 2013
    Assignee: National Cheng Kung University
    Inventors: Tsorng-Juu Liang, Wen-Yu Huang, Lung-Sheng Yang, Shih-Ming Chen, Jiann-Fuh Chen
  • Publication number: 20120113688
    Abstract: An interleaved flyback converter device with leakage energy recycling includes: two flyback converters and an input power. Each flyback converter includes a capacitor, a switch, two diodes, and a transformer. The input power is connected to the capacitors of the two flyback converters respectively. By using the capacitors as input voltage, the two flyback converters are provided with lower voltage rating. The diodes are used to recycle leakage energy directly, and to clamp voltage on power components. Therefore, in addition to enhancing efficiency via recycling leakage energy, the two flyback converters have lower switching losses due to lower switching voltage.
    Type: Application
    Filed: February 15, 2011
    Publication date: May 10, 2012
    Applicant: National Cheng Kung University
    Inventors: Tsorng-Juu Liang, Wen-Yu Huang, Lung-Sheng Yang, Shih-Ming Chen, Jiann-Fuh Chen
  • Publication number: 20080068052
    Abstract: The present invention relates to a circuit providing frequency-doubling function. More particularly, the present invention relates to a frequency doubler circuit comprising dual Gilbert mixers in replace with the single mixer scheme in the conventional direct conversion transceiver circuit. CMOS technology is preferred in order to lower size and power consumption of the specific IC. With a balanced output load, either is resistor-capacitor (RC) load, resistor-inductor (RL) load, or a combination of the three (RLC), symmetrical output waveforms are obtained thereby. Notice that two quadrature inputs and their inverse-phase signals are provided to the purposed dual Gilbert mixer circuit, and two outputs in inverse-phase are obtained accordingly as meditated in this invention.
    Type: Application
    Filed: September 20, 2006
    Publication date: March 20, 2008
    Applicant: EE Solutions, Inc
    Inventors: Tung-Meng Tsai, Boson Lin, Wen-Yu Huang, Son-Fu Yeh, Chia-Meng Lee