Abstract: The present disclosure provides a flexible integrated array sensor and manufacturing methods thereof. The array sensor includes a silicon wafer, a readout circuit layer, a sensing array layer, and a polymer substrate layer disposed on the silicon wafer. The manufacturing method includes: preparing a silicon wafer; fabricating a plurality of function arrays, each including m*n function units, on a surface of the silicon wafer; etching one or more deep grooves on the surface of the silicon wafer between the arrays; fabricating a thinning support; and thinning a bottom surface of the silicon wafer to a target thickness so that the arrays are separated from each other. The etching depth for etching the one or more deep grooves is equal to or greater than the thickness of the silicon wafer after thinning.

Abstract: The present disclosure provides an energy identification method for a micro-energy device based on back propagation (BP) neural network, which includes the following steps: S1, sampling a dynamic voltage of a micro-energy device in an open-circuit state to obtain an original voltage signal, and denoising the original voltage signal by an adaptive threshold wavelet transform; S2, extracting an R wave peak value of the denoised voltage signal so as to obtain model input data; S3, establishing a BP neural network model, inputting data to train the model, and stopping training when a training error is smaller than a preset value, to obtain a qualified BP neural network model; and S4, identifying a to-be-identified voltage signal by using the BP neural network model obtained in the step S3. According to the present disclosure, accurate and rapid energy identification and classification can be carried out, and the classification result is reliable.

Abstract: The present disclosure provides a flexible integrated array sensor and manufacturing methods thereof. The array sensor includes a silicon wafer, a readout circuit layer, a sensing array layer, and a polymer substrate layer disposed on the silicon wafer. The manufacturing method includes: preparing a silicon wafer; fabricating a plurality of function arrays, each including m*n function units, on a surface of the silicon wafer; etching one or more deep grooves on the surface of the silicon wafer between the arrays; fabricating a thinning support; and thinning a bottom surface of the silicon wafer to a target thickness so that the arrays are separated from each other. The etching depth for etching the one or more deep grooves is equal to or greater than the thickness of the silicon wafer after thinning.