Patents by Inventor Wentong Zhang

Wentong Zhang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240179246
    Abstract: A hierarchical decoupling, integrated and open communication open system includes a large communication network, a Yunxi platform, and a customer, which are communicatively connected to one another, wherein the Yunxi platform includes a service application layer, a communication capability layer and a resource pool, which are communicatively connected to one another, the large communication network, the communication capability layer and the customer are communicatively connected to one another, and the service application layer is communicatively connected to the customer. The present invention innovates decentralized communication service provision methods, further integrate communication capabilities, encapsulate communication scenarios into flexible and easy-to-use communication modules, and provide a unified and convenient service interface, thereby lowering a user-side access threshold, and deeply integrating communication capabilities with application scenarios of government and enterprise customers.
    Type: Application
    Filed: December 27, 2023
    Publication date: May 30, 2024
    Inventors: Zhaobiao LYU, Wenbo ZHAO, Jianbo LIU, Guoxin ZHANG, Chao CHENG, Junwu LI, Qing XIAO, Zhaojun CUI, Wentong LI
  • Publication number: 20240112914
    Abstract: A new variable selective etching technology for thick SOI devices. An SOI material is etched by the following steps: (1) providing an SOI wafer; (2) depositing a composite hard mask with a variable selection ratio to replace a traditional hard mask with an invariable selection ratio; (3) applying a photoresist; (4) mask making, namely defining a to-be-etched region by using a photoetching plate; (5) etching the photoresist in the defined region; (6) etching the composite hard mask; (7) removing the photoresist; (8) etching top silicon by using a second etching method at a first selection ratio; and (9) etching a buried oxide layer by using a third etching method at a second selection ratio. The new variable selective etching technology avoids the damage to a side wall of a deep trench when the buried oxide layer is etched, and does not need to use an excessive thick hard mask.
    Type: Application
    Filed: March 15, 2023
    Publication date: April 4, 2024
    Applicant: University of Electronic Science and Technology of China
    Inventors: Bo ZHANG, Teng LIU, Wentong ZHANG, Nailong HE, Sen ZHANG, Ming QIAO, Zhaoji LI
  • Publication number: 20240055489
    Abstract: A homogenization field device with low specific on-resistance based on multidimensional coupled voltage dividing mechanism includes a first conductive type semiconductor substrate, a first conductive type well region, a first conductive type semiconductor contact region, a second conductive type drift region, a second conductive type well region, a second conductive type semiconductor contact region, a first dielectric oxide layer, a second dielectric oxide layer, a third dielectric oxide layer, a fourth dielectric oxide layer, a polycrystalline silicon electrode of a floating field plate, a polycrystalline silicon electrode of a control gate, a first layer of metal strips and a second layer of metal strips. The first dielectric oxide layer and the polycrystalline silicon electrode of the floating field plate form a vertical floating field plate, and the first layer of metal strips, the second layer of metal strips and the fourth dielectric oxide layer form a surface fixed dielectric capacitor.
    Type: Application
    Filed: November 25, 2022
    Publication date: February 15, 2024
    Applicant: University of Electronic Science and Technology of China
    Inventors: Bo ZHANG, Lingying WU, Yuting LIU, Wentong ZHANG, Zhaoji LI
  • Patent number: 11888022
    Abstract: An SOI lateral homogenization field high voltage power semiconductor device, and a manufacturing method and application thereof are provided. The device includes a type I conductive semiconductor substrate, a type II conductive drift region, a type I field clamped layer, type I and type II conductive well regions, the first dielectric oxide layer forming a field oxide layer, the second dielectric oxide layer forming a gate oxide layer, a type II conductive buried dielectric layer, a type II conductive source heavily doped region, a type II conductive drain heavily doped region. The first dielectric oxide layer and the floating field plate polysilicon electrodes form a vertical floating field plate distributed throughout the type II conductive drift region to form a vertical floating equipotential field plate array. When the device is in on-state, high doping concentration can be realized by the full-region depletion effect form the vertical field plate arrays.
    Type: Grant
    Filed: May 16, 2022
    Date of Patent: January 30, 2024
    Assignee: University of Electronic Science and Technology of China
    Inventors: Wentong Zhang, Ning Tang, Ke Zhang, Nailong He, Ming Qiao, Zhaoji Li, Bo Zhang
  • Publication number: 20230053369
    Abstract: An SOI lateral homogenization field high voltage power semiconductor device, and a manufacturing method and application thereof are provided. The device includes a type I conductive semiconductor substrate, a type II conductive drift region, a type I field clamped layer, type I and type II conductive well regions, the first dielectric oxide layer forming a field oxide layer, the second dielectric oxide layer forming a gate oxide layer, a type II conductive buried dielectric layer, a type II conductive source heavily doped region, a type II conductive drain heavily doped region. The first dielectric oxide layer and the floating field plate polysilicon electrodes form a vertical floating field plate distributed throughout the type II conductive drift region to form a vertical floating equipotential field plate array. When the device is in on-state, high doping concentration can be realized by the full-region depletion effect form the vertical field plate arrays.
    Type: Application
    Filed: May 16, 2022
    Publication date: February 23, 2023
    Applicant: University of Electronic Science and Technology of China
    Inventors: Wentong ZHANG, Ning TANG, Ke ZHANG, Nailong HE, Ming QIAO, Zhaoji LI, Bo ZHANG
  • Patent number: 10068965
    Abstract: The present invention relates to a lateral high-voltage device. The device includes a dielectric trench region. A doping-overlapping structure with different doping types alternating mode is provided at least below, on a left side of, or on a right side of the dielectric trench region. The device also includes a dielectric layer, a body field plate, a polysilicon gate, a gate oxide layer, a first N-type heavy doping region, a second N-type heavy doping region, a P-type heavy doping region, a P-well region, the first N-type doping pillar, the second N-type doping pillar, the third N-type doping pillar, the first P-type doping pillar, and the second P-type doping pillar. The invention adopts a dielectric trench region in the drift region to keep the breakdown voltage BV of the device while reducing the surface area of the device, and effectively reducing the device's specific On-Resistance RON,sp.
    Type: Grant
    Filed: September 28, 2017
    Date of Patent: September 4, 2018
    Assignee: University of Electronic Science and Technology of China
    Inventors: Ming Qiao, Yang Yu, Wentong Zhang, Zhengkang Wang, Zhenya Zhan, Bo Zhang