Patents by Inventor Wesley D. Martin

Wesley D. Martin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20170011785
    Abstract: The embodiments of the present disclosure identify a target chip from among multiple chips coupled to a shared bus and customize an optimization parameter for the particular chip. Stated differently, in a communication system where only one chip (or a subset of chips) on a shared bus is the intended target, the system can customize an optimization parameter for the specific location of the target chip on the bus. As new data is received that is intended for a different chip—i.e., the target chip changes—the system can dynamically change the parameter based on the location of the new target chip on the bus.
    Type: Application
    Filed: July 8, 2015
    Publication date: January 12, 2017
    Inventors: Layne A. BERGE, Benjamin A. FOX, Wesley D. MARTIN, George R. ZETTLES, IV
  • Publication number: 20170011784
    Abstract: The embodiments of the present disclosure identify a target chip from among multiple chips coupled to a shared bus and customize an optimization parameter for the particular chip. Stated differently, in a communication system where only one chip (or a subset of chips) on a shared bus is the intended target, the system can customize an optimization parameter for the specific location of the target chip on the bus. As new data is received that is intended for a different chip—i.e., the target chip changes—the system can dynamically change the parameter based on the location of the new target chip on the bus.
    Type: Application
    Filed: July 8, 2015
    Publication date: January 12, 2017
    Inventors: Layne A. BERGE, Benjamin A. FOX, Wesley D. MARTIN, George R. ZETTLES, IV
  • Publication number: 20170010999
    Abstract: The embodiments of the present disclosure identify a target chip from among multiple chips coupled to a shared bus and customize an optimization parameter for the particular chip. Stated differently, in a communication system where only one chip (or a subset of chips) on a shared bus is the intended target, the system can customize an optimization parameter for the specific location of the target chip on the bus. As new data is received that is intended for a different chip—i.e., the target chip changes—the system can dynamically change the parameter based on the location of the new target chip on the bus.
    Type: Application
    Filed: August 24, 2015
    Publication date: January 12, 2017
    Inventors: Layne A. BERGE, Benjamin A. FOX, Wesley D. MARTIN, George R. ZETTLES, IV
  • Publication number: 20170010985
    Abstract: The embodiments of the present disclosure identify a target chip from among multiple chips coupled to a shared bus and customize an optimization parameter for the particular chip. Stated differently, in a communication system where only one chip (or a subset of chips) on a shared bus is the intended target, the system can customize an optimization parameter for the specific location of the target chip on the bus. As new data is received that is intended for a different chip—i.e., the target chip changes—the system can dynamically change the parameter based on the location of the new target chip on the bus.
    Type: Application
    Filed: August 24, 2015
    Publication date: January 12, 2017
    Inventors: Layne A. BERGE, Benjamin A. FOX, Wesley D. MARTIN, George R. ZETTLES, IV
  • Publication number: 20170010987
    Abstract: The embodiments of the present disclosure identify a target chip from among multiple chips coupled to a shared bus and customize an optimization parameter for the particular chip. Stated differently, in a communication system where only one chip (or a subset of chips) on a shared bus is the intended target, the system can customize an optimization parameter for the specific location of the target chip on the bus. As new data is received that is intended for a different chip—i.e., the target chip changes—the system can dynamically change the parameter based on the location of the new target chip on the bus.
    Type: Application
    Filed: July 8, 2015
    Publication date: January 12, 2017
    Inventors: Layne A. BERGE, Benjamin A. FOX, Wesley D. MARTIN, George R. ZETTLES, IV
  • Patent number: 9453863
    Abstract: A method, system and computer program product are provided for implementing frequency spectrum analysis of noise in a device under test using causality (Hilbert Transform) results of Vector Network Analyzer (VNA) VNA-generated S-parameter model Information. A plurality of S-parameter samples are collected from the VNA generated S-parameter model Information. A Hilbert Transform of the collected plurality of S-parameter samples is used for error magnitude per frequency point analysis. An average error magnitude of predefined collected error magnitude samples is calculated to identify environmental noise in the device under test and used to identify acceptable environmental effects on the device under test.
    Type: Grant
    Filed: November 16, 2012
    Date of Patent: September 27, 2016
    Assignee: International Business Machines Corporation
    Inventors: Gerald K. Bartley, Matthew S. Doyle, Richard B. Ericson, Wesley D. Martin, George R. Zettles, IV
  • Publication number: 20140142883
    Abstract: A method, system and computer program product are provided for implementing frequency spectrum analysis of noise in a device under test using causality (Hilbert Transform) results of Vector Network Analyzer (VNA) VNA-generated S-parameter model Information. A plurality of S-parameter samples are collected from the VNA generated S-parameter model Information. A Hilbert Transform of the collected plurality of S-parameter samples is used for error magnitude per frequency point analysis. An average error magnitude of predefined collected error magnitude samples is calculated to identify environmental noise in the device under test and used to identify acceptable environmental effects on the device under test.
    Type: Application
    Filed: November 16, 2012
    Publication date: May 22, 2014
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Gerald K. Bartley, Matthew S. Doyle, Richard B. Ericson, Wesley D. Martin, George R. Zettles, IV
  • Patent number: 7939131
    Abstract: The present invention includes a method and a composition to form a layer on a substrate having uniform etch characteristics. To that end, the method includes controlling variations in the characteristics of a solid layer, such etch characteristics over the area of the solid layer as a function of the relative rates of evaporation of the liquid components that comprise the composition from which the solid layer is formed.
    Type: Grant
    Filed: August 16, 2004
    Date of Patent: May 10, 2011
    Assignee: Molecular Imprints, Inc.
    Inventors: Frank Y. Xu, Christopher J. Mackay, Pankaj B. Lad, Ian M. McMackin, Van N. Truskett, Wesley D. Martin, Edward B. Fletcher, David C. Wang, Nicholas A. Stacey, Michael P. C. Watts
  • Publication number: 20090268422
    Abstract: A scalable electronic package assembly for memory devices and other terminated bus structures is disclosed. The scalable electronic package assembly includes a first electronic carrier and a second electronic carrier. The first electronic carrier includes a first set of electronic devices controlled by a controller. The second electronic carrier includes a second set of electronic devices that are also controlled by the controller on the first electronic carrier. The second electronic carrier is electrically connected to the first electronic carrier via multiple solder columns. The second electronic carrier is physically stacked on top of the first electronic carrier via an insulator.
    Type: Application
    Filed: April 29, 2008
    Publication date: October 29, 2009
    Inventors: Mark J. Bailey, Gerald K. Bartley, Richard B. Ericson, Wesley D. Martin, Benjamin W. Mashak, Trevor J. Timpane
  • Patent number: 5513939
    Abstract: This invention discloses a two-wheeled device that can roll over and straddle three sizes of tanks, extend the adjustable feet to a lift position, raise the back end of the tank, connect a chain and hook to the front end of the tank, lift both front and back tank legs off the ground, and roll the tank over the ground or floor. The handle length is adjustable to accommodate three different tank lengths and the chain and hook can also adjust horizontally to accommodate these three lengths. The feet are also retractable to permit rolling the device past the two front legs on the tank.
    Type: Grant
    Filed: September 2, 1994
    Date of Patent: May 7, 1996
    Assignee: L.P. Tank Troll, Inc.
    Inventors: Wesley D. Martin, Lynn A. Adams