Patents by Inventor Wilco A. Verweij

Wilco A. Verweij has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230230833
    Abstract: A method for forming layers with silicon is disclosed. The layers may be created by positioning a substrate within a processing chamber, heating the substrate to a first temperature between 300 and 500° C. and introducing a first precursor into the processing chamber to deposit a first layer. The substrate may be heated to a second temperature between 400 and 600° C.; and, a second precursor may be introduced into the processing chamber to deposit a second layer. The first and second precursor may comprise silicon atoms and the first precursor may have more silicon atoms per molecule than the second precursor.
    Type: Application
    Filed: March 28, 2023
    Publication date: July 20, 2023
    Inventors: Dieter Pierreux, Steven van Aerde, Bert Jongbloed, Kelly Houben, Werner Knaepen, Wilco Verweij
  • Publication number: 20230223258
    Abstract: A method and a wafer processing furnace for forming an epitaxial stack on a plurality of substrates is provided. In a preferred embodiment, the method comprises providing plurality of substrates to a process chamber. A plurality of deposition cycles are executed, thereby forming the epitaxial stack on the plurality of substrates. The epitaxial comprises a plurality of epitaxial pairs, each pair comprising a first epitaxial layer and a second epitaxial layer. The deposition cycle comprises a first deposition pulse and a second deposition pulse.
    Type: Application
    Filed: January 11, 2023
    Publication date: July 13, 2023
    Inventors: Dieter Pierreux, Kelly Houben, Steven Van Aerde, Wilco Verweij, Bert Jongbloed, Charles Dezelah
  • Publication number: 20230220588
    Abstract: A method of forming an epitaxial stack on a plurality of substrates is provided. In a preferred embodiment, the method comprises providing a semiconductor processing apparatus. This semiconductor processing apparatus comprises a process chamber and a carousel for stationing a wafer boat before or after processing in the process chamber. The method further comprises loading the wafer boat into the process chamber, the wafer boat comprising the plurality of substrates. The method further comprises processing the plurality of substrates in the process chamber, thereby forming, on the plurality of substrates, the epitaxial stack. This epitaxial stack has a pre-determined thickness. The processing comprises unloading the wafer boat, one or more times, from the process chamber to the carousel until the epitaxial stack reaches the pre-determined thickness.
    Type: Application
    Filed: January 11, 2023
    Publication date: July 13, 2023
    Inventors: Steven Van Aerde, Wilco Verweij, Dieter Pierreux, Kelly Houben, Bert Jongbloed, Peter Westrom
  • Publication number: 20230223255
    Abstract: A method and a wafer processing furnace for forming an epitaxial stack on a plurality of substrates is provided. In a preferred embodiment, the method comprises providing the plurality of substrates to a process chamber. A plurality of deposition cycles is executed, thereby forming the epitaxial stack on the plurality of substrates. The epitaxial stack comprises a plurality of epitaxial pairs, wherein the epitaxial pairs each comprises a first epitaxial layer and a second epitaxial layer, the second epitaxial layer being different from the first epitaxial layer. Each deposition cycle comprises a first deposition pulse and a second deposition pulse. The first deposition pulse comprises a provision of a first reaction gas mixture to the process chamber, thereby forming the first epitaxial layer. The second deposition pulse comprises a provision of a second reaction gas mixture to the process chamber, thereby forming the second epitaxial layer.
    Type: Application
    Filed: January 11, 2023
    Publication date: July 13, 2023
    Inventors: Steven Van Aerde, Wilco Verweij, Bert Jongbloed, Dieter Pierreux, Kelly Houben, Rami Khazaka, Frederick Aryeetey, Peter Westrom, Omar Elleuch, Caleb Miskin
  • Patent number: 11646204
    Abstract: A method for forming layers with silicon is disclosed. The layers may be created by positioning a substrate within a processing chamber, heating the substrate to a first temperature between 300 and 500° C. and introducing a first precursor into the processing chamber to deposit a first layer. The substrate may be heated to a second temperature between 400 and 600° C.; and, a second precursor may be introduced into the processing chamber to deposit a second layer. The first and second precursor may comprise silicon atoms and the first precursor may have more silicon atoms per molecule than the second precursor.
    Type: Grant
    Filed: June 21, 2021
    Date of Patent: May 9, 2023
    Assignee: ASM IP Holding B.V.
    Inventors: Dieter Pierreux, Steven van Aerde, Bert Jongbloed, Kelly Houben, Werner Knaepen, Wilco Verweij
  • Patent number: 11501968
    Abstract: Method for filling a gap, comprising providing in a deposition chamber a semiconductor substrate having a gap, wherein a bottom of the gap includes a crystalline semiconducting material and wherein a side wall of the gap includes an amorphous material; depositing a silicon precursor in the gap.
    Type: Grant
    Filed: November 9, 2020
    Date of Patent: November 15, 2022
    Assignee: ASM IP Holding B.V.
    Inventors: Dieter Pierreux, Anna Trovato, Kelly Houben, Steven van Aerde, Bert Jongbloed, Wilco A. Verweij
  • Publication number: 20210407789
    Abstract: A method for forming layers with silicon is disclosed. The layers may be created by positioning a substrate within a processing chamber, heating the substrate to a first temperature between 300 and 500° C. and introducing a first precursor into the processing chamber to deposit a first layer. The substrate may be heated to a second temperature between 400 and 600° C.; and, a second precursor may be introduced into the processing chamber to deposit a second layer. The first and second precursor may comprise silicon atoms and the first precursor may have more silicon atoms per molecule than the second precursor.
    Type: Application
    Filed: June 21, 2021
    Publication date: December 30, 2021
    Inventors: Dieter Pierreux, Steven van Aerde, Bert Jongbloed, Kelly Houben, Werner Knaepen, Wilco Verweij
  • Publication number: 20210151315
    Abstract: Method for filling a gap, comprising providing in a deposition chamber a semiconductor substrate having a gap, wherein a bottom of the gap includes a crystalline semiconducting material and wherein a side wall of the gap includes an amorphous material; depositing a silicon precursor in the gap.
    Type: Application
    Filed: November 9, 2020
    Publication date: May 20, 2021
    Inventors: Dieter Pierreux, Anna Trovato, Kelly Houben, Steven van Aerde, Bert Jongbloed, Wilco A. Verweij