Abstract: The invention relates to a method for producing vertical through-contacts (micro-vias) in semi-conductor wafers in order to produce semi-conductor components, i.e. contacts on the front side of the wafer through the semi-conductor wafer to the rear side of the wafer. The invention also relates to a method which comprises the following steps: blind holes on the contact connection points are laser drilled from the rear side of the wafer into the semi-conductor substrate, the wafer is cleaned, the semi-conductor substrate is plasma etched in a material selected manner until the active layer stack of the wafer is reached, the active layer stack of the wafer is plasma etched in a material selective manner until the contacts, which are to be connected to the rear side of the wafer, are reached, a plating base is applied to the rear side of the wafer and into the blind holes and gold is applied by electrodeposition onto the metallizied rear side of the wafer and the blind holes.

Abstract: The invention relates to a method for producing vertical through-contacts (micro-vias) in semi-conductor wafers in order to produce semi-conductor components, i.e. contacts on the front side of the wafer through the semi-conductor wafer to the rear side of the wafer. The invention also relates to a method which comprises the following steps: blind holes on the contact connection points are laser drilled from the rear side of the wafer into the semi-conductor substrate, the wafer is cleaned, the semi-conductor substrate is plasma etched in a material selected manner until the active layer stack of the wafer is reached, the active layer stack of the wafer is plasma etched in a material selective manner until the contacts, which are to be connected to the rear side of the wafer, are reached, a plating base is applied to the rear side of the wafer and into the blind holes and gold is applied by electrodeposition onto the metallizied rear side of the wafer and the blind holes.

Abstract: In the process according to the invention for soldering electronic boards, in particular, printed circuit boards with devices installed on them, first, during the pickling process, a condensable process material, for example, water, is introduced into flaws in the oxide layers on the soldering connection surfaces and at least partially condensed in the flaws. Then, the oxide layers are exposed to rapid heating such that the process material condensed in the flaws vaporizes explosively and thus the oxide layer breaks up and cracks off of the basis material, such that the soldering connection surfaces for the subsequent actual soldering process are brought to virgin condition. In the case of wave soldering, the rapid heating occurs preferably by means of the wave of solder itself. If non-oxide passive layers must also be removed, this occurs preferably in a preceding stage of the pickling process, during which the oxide layer is hydrophilized. For this, a plasma pretreatment is suitable.

Abstract: The invention is directed to a procedure for processing joints to be soldered, preferably printed circuit boards fitted with electric components, and an arrangement for executing this procedure, wherein the joints are subjected to plasma treatment before the soldering process. The joints may be subjected to plasma treatment separately or in the relative position necessary for the soldering process.

Abstract: Cured cementitious compositions having a modulus of rupture of greater than 15 MN/m.sup.2 are prepared by curing and drying a homogeneous uncured cementitious composition which comprises in defined proportions hydraulic cement, water and a selected water-dispersible polymer.