Abstract: According to the invention, the high-frequency power amplifier is characterised in that the power transistor is switched in such a way that said transistor is operated in the breakdown region and that a control loop is provided. Charge carriers that are produced is the breakdown region are carried away from an output of the operational amplifier by means of said control loop.

Abstract: A circuit arrangement generates a resistance behavior with an adjustable positive temperature coefficient. A second ohmic resistance element is connected in parallel with a series circuit of a first ohmic resistance element and a diode element wherein the value of the second ohmic resistance element is set corresponding to the desired temperature coefficient.

Abstract: The present invention describes a bipolar impedance converter circuit, which comprises a differential amplifier that has a closed-loop control circuit in its negative feedback loop. This closed-loop control circuit comprises npn transistors, which because of their relatively low stray capacitances and their fast switching speed provide an impedance converter circuit with greater invulnerability to disturbances in the supply voltage and have faster switching behavior than known circuits in the prior art, which use pnp transistors in their negative feedback loop.

Abstract: A frequency divider such as a dual modulus prescaler has a division factor switchable between 1/N and 1/(N+1) and an input frequency of approximately 1 GHz as occurs, for example, in mobile telecommunication systems (GSM or DECT telephones). Low power consumption is achieved by using only the input flipflop to process the relatively high input frequency and an intermediate signal having only half the frequency is supplied to an intermediate divider and an output signal is already taken at a penultimate stage of a divider expansion connected following the intermediate divider.

Abstract: A driver circuit for driving a load connected between an output terminal and a reference potential, includes a first transistor having a collector connected to a first supply potential and an emitter connected to the output terminal. A second transistor has a collector connected to the output terminal and an emitter connected to the reference potential. An emitter-coupled transistor pair has bases to which a symmetrical control signal is applied, one collector which is coupled through a first resistor to the first supply potential and another collector which is coupled through a second resistor with the output terminal. A controllable current source supplies the transistor pair. A control device controls the current source in proportion to a supply voltage occurring between the first supply potential and the reference potential.

Abstract: A driver circuit for an LED includes a switch device being connected to the LED, being controlled by an input signal, and having a current source circuit. The switch device short-circuits the LED after a transition to a first switching state, and the switch device supplies the LED from the current source circuit after a transition to a second switching state, causing a higher current to flow initially and causing a lesser current to flow after a predetermined time period has elapsed.

Abstract: Circuit arrangement for generating a bias potential includes a first transistor connected on a collector side thereof to a supply potential, a first resistor connected between a base and the collector of the first transistor, a first current source connected between the base of the first transistor and a reference potential, a second current source connected between an emitter of the first transistor and the reference potential, a second transistor connected on a collector side thereof to the supply potential and on a base side thereof to the emitter of the first transistor, a third current source connected between the emitter of the second transistor and the reference potential, a third transistor carrying the bias potential on a collector side thereof, a second resistor connected between the emitter of the second transistor and a base of the third transistor, a third resistor connected between the collector of the third transistor and the supply potential, a first diode connected in the forward direction th

Abstract: A transimpedance amplifier circuit includes an inverting voltage amplifier having an input being supplied with an input current and an output carrying an output voltage. A coupling member is connected between the input and the output of the voltage amplifier. The coupling member has two diodes being connected antiserially to one another between the input and the output of the voltage amplifier with a common node point. A transistor has a load path being connected between the common node point and a ground potential. A differential amplifier has one input connected to the input of the voltage amplifier, another input connected to the output of the voltage amplifier, and an output. A low-pass filter is connected downstream of the differential amplifier for furnishing a trigger signal at the output to the transistor.

Abstract: A line driver switching stage includes a terminal for a reference potential, a terminal for a supply potential, and an output terminal of the line driver switching stage. A differential amplifier has a first and a second amplifier branch. The first amplifier branch has a resistor with first and second terminals. The first terminal of the resistor is the terminal for the reference potential. An emitter follower transistor has an emitter and has a base-to-emitter path connected between the second terminal of the resistor and the output terminal. A saturation prevention element has a first terminal connected to the output terminal and a second terminal connected to the second amplifier branch. A bipolar transistor has a base-to-emitter path connected between the second terminal of the saturation prevention element and the terminal for the supply potential. The bipolar transistor has a collector connected to the emitter of the emitter follower transistor.

Abstract: An inverter stage includes a supply voltage terminal and a reference potential terminal. An npn transistor has a base terminal for receiving an input signal, a collector terminal for supplying an output signal, and an emitter terminal. A controllable current source is connected between the emitter terminal of the transistor and the reference potential terminal. A series circuit of at least two diodes is connected between the supply voltage terminal and the collector terminal of the transistor. A symmetrical inverter stage assembly includes two of the inverter stages being connected in parallel with the emitters of the transistors of each of the inverter stages being connected to one another. A ring oscillator includes n (n.gtoreq.1) of the inverter stages connected in series. The inverter stages include first and last inverter stages, each of the inverter stages has an output and an input, and the output of the last inverter stage is connected to the input of the first inverter stage.

Abstract: A digital switching stage includes a differential amplifier having a first and a second differential amplifier branch. A first resistor is connected in the first differential amplifier branch and has a first terminal and a second terminal. The first terminal is a terminal for a first supply potential. A first bipolar transistor is connected in an emitter follower circuit with respect to the second terminal of the first resistor and has an emitter being connected to an output terminal. A second bipolar transistor has a base and has a collector-to-emitter path being connected between the output terminal and a terminal for a second supply potential. A second resistor is connected in the second differential amplifier branch and has a first terminal and a second terminal. The first terminal of the second resistor is connected to the output terminal and the second terminal of the second resistor is connected to the base of the second bipolar transistor.

Abstract: A current mode logic switching stage, especially an output stage for driving capacitive loads, includes a differential amplifier configuration and at least two bipolar transistors, which are connected as an emitter follower circuit to the output of the differential amplifier configuration. The emitter of one of the bipolar transistors is connected with an output of the switching stage. A controllable current source, which is controlled by a comparison device, is connected between the output and a negative supply potential. The comparison device receives emitter signals of the bipolar transistors. The current source is controlled in such a way that it impresses a high current only during a negative output signal edge. The comparison device is formed with a current mirror.

Abstract: A phase shifter VCO has at least first and last fundamental circuits each including an amplifier adding circuit, a control input connected to all of the other control inputs for a tuning potential varying an amplification operative ratio between the first input and the output to the second input and the output of the adding circuit, a reference input for a reference potential, symmetrical first and second non-inverting and inverting circuit input pairs, a symmetrical non-inverting and inverting circuit output pair, and a symmetrical timing element having an input connected to the first circuit input and having an output forming the first input of the adding circuit. The first non-inverting input of the first fundamental circuit is connected to the non-inverting output of the last fundamental circuit, and the first inverting input of the first fundamental circuit is connected to the inverting output of the last fundamental circuit.

Abstract: A semiconductor circuit arrangement in ECL technology having logical conjunctions between more than two input variables, includes two series-gating stages having ECL current switches, which are controlled by an input variable, each including a reference circuit and at least one control circuit, at least one threshold voltage diode for separating at least two of the logical junctions from one another, further comprising a multiemitter transistor included in the control circuit of the ECL current switch forming the reference circuit, at least one diode-connected transistor having at least two emitters and one collector resistor which forms a logical conjunction of the signal present at the emitters of the diode-connected transistor.

Abstract: A circuit for compensating the temperature dependence of gate propagation times includes a signal input for feeding-in an input signal; a signal output for issuing an output signal; a multiplexer having an output connected to the signal output and three inputs; a delay gate connected between one of the inputs of the multiplexer and the signal input, another of the inputs of the multiplexer being directly connected to the signal input; and a control input connected to a further one of the inputs of the multiplexer for controlling the multiplexer in dependence on temperature and feeding the input signal to the signal output delayed in a lower temperature range, undelayed in an upper temperature range and mixed, delayed as well as undelayed in a temperature range therebetween.

Abstract: A semiconductor circuit arrangement in ECL technology for realizing logic conjunctions between more than three input variables includes at least two series-gating stages having at least two ECL current switches controlled by an input variable each and each includes a reference circuit and at least one control circuit, forming logical conjunctions if connected in series and at least one diode for separating the conjunctions from each other by at least one diode threshold voltage, further including a push-pull differential amplifier forming the control circuit of each ECL current switch for forming a logical conjunction between input signals of the push-pull differential amplifier and at least one signal depending on an input variable of another voltage level.

Abstract: A bipolar clock-controlled bistable multivibrator circuit arrangement having a static memory cell formed of a D-master-slave flip-flop with a first inverted output signal fed back to a data input and with feedback loops, respectively, for intermediately storing output signals of the master and the slave. A dynamic memory cell is formed of the D-master-slave flip-flop with a second inverted output signal fed back to the data input. The second inverted output signal has gate propagation times performing intermediate memory functions in place of the feedback loops and includes a synchronizing device connected between the static and the dynamic memory cells. Means are provided for setting the circuit of the static memory cell in operation at relatively high clock frequencies. Thereby the useful frequency range of the multivibrator is at least doubled.

Abstract: A circuit for reading bipolar storage cells includes a storage element formed of two fed-back inverters, each of the inverters being formed of a multi-emitter transistor and a load element connected to a respective one of the multi-emitter transistors, two complementary bit-lines each being connected to one emitter of a respective one of the multi-emitter transistors, a first potential source, two bit-line current sources each being connected between the first potential source and a respective one of the complimentary bit-lines, a differential amplifier having two inputs, two read transistors each having a collector-emitter path connected between a respective one of the inputs of the differential amplifier and a respective one of the complimentary bit-lines, a second potential source, a read-current source connected to the second potential source, and two diode paths each connected between the read-current source and a respective one of the complimentary bit-lines.

Abstract: A bipolar semiconductor circuit arrangement with transistors of one conduction type having a differential amplifier stage formed by a first and a second transistor with collectors coupled back crosswise to bases thereof and with emitters thereof connected to terminal of a current source having another terminal which is at supply potential, the first and second transistors having a collector circuit wherein a respective resistance is connected includes a pair of control transistors having collector-emitter paths connected between the respective resistances and the collectors of the first and second transistors of the differential amplifier stage, the control transistors having respective base terminals serving as a source of complimentary input signals, and having respective collectors connected to a source of complementary output signals.

Abstract: An integrable semiconductor circuit for a multi-stage frequency divider having a number of master-slave flip-flop cells constructed in current mode logic forming the individual divider stages which are connected in series to a supply voltage and which are accordingly at different levels of the supply voltage has an input stage to which an input signal at an input frequency, and the inverse thereof, are supplied. The input stage is in the form of a differential amplifier having two identical transistors which are connected to a constant current source. The differential amplifier forms the first divider stage, that is, the first master-slave flip-flop, in combination with a first network including a number of transistors and load resistors. The further divided stages do not require an input circuit, therefore each subsequent stage includes only a network corresponding to the network of the first stage.