Abstract: A semiconductor device is provided with a polyimide film 21 between the encapsulating synthetic resin 16 and the passivating film 20. If a material having a high hardness (E-modulus.gtoreq.1.0.multidot.10.sup.10 Pa) is selected as the polyimide, the number of defects caused by variations in temperature is reduced.

Abstract: Semiconductor device with a wiring pattern 3, 6 is provided with an insulating layer 4 embedded in an envelope 5 made of synthetic material. To prevent hair cracks in the insulating layer 4, the thickness of the insulating layer 4 is so chosen that the lowest point of top 8 of the insulating layer 4 is at a higher leverl than the highest point of the wiring pattern 3, 6.

Abstract: A semiconductor device comprising a semiconductor element (1), a carrier member (2) for the semiconductor element, electrical connection conductors (3) and wire connections (4) between connection areas (7) on the semiconductor element and the electrical connection conductors is provided with a coating (6, 9) on the surface of the semiconductor element remote from the carrier member, where the active circuit is situated, and is enveloped with a synthetic material. The coating (6, 9) is electrically insulating and has an elasticity for absorbing shear stresses which occur between the active surface (5) of the semiconductor element and the envelope. To prevent pattern shift as well as wire fracture or tearing off of the wire, the coating (9) is present only at the outer edge of the active surface of the semiconductor element (1), leaving the central portion of this surface exposed with the coating (9) extending beyond or around the connection areas (7) for the wire connections.

Abstract: Spaced-apart regions (2) each having top (2a) and side walls (2b) meeting at an edge (20) are defined on a surface (1a) of a substructure (1) forming part of the device. A layer (3) of insulating material is provided over the surface (1a) and regions (2), so that the insulating material is provided preferentially at the edges (20) of the regions (2) to form adjacent the edges (20) portions (31) of the insulating material which overhang the underlying insulating material (32) provided on the surface (1a) and define a void therein. The insulating material layer (3) is then etched anisotropically to expose the top walls (2a).

Abstract: A method of forming an interconnection between conductive levels is described in which a first conductive level (4) is provided on a surface of a substrate body such as a semiconductor body (1) so that the first conductive level (4) has a contact area (10). Passivating material (6) is provided on the surface of the body (1) to cover the first conductive level (4) and the contact area (10) is then exposed by opening in the passivating material (6) a window (9) larger than the contact area (10) so that there is a gap (11) between the periphery (9a) of the window (9) and a side wall (5a) of the first conductive level (4) bounding the contact area (10). After opening the window (9) material (13b) is provided in the gap (11). Preferably, the material is provided by applying and then solidifying a spin-on-glass and subsequently etching back the spin-on-glass to expose the contact area.