Abstract: A quad oscillator fault-tolerant clock system for a computer complex comprises two clock sources at each of two computer locations, which are coupled by two duplex links. Each clock source supplies its own clock signal to the other clock source at the same location as well as to the clock sources at the other location over one of the duplex links coupling the two locations. Each clock source continually measures the phase difference between its clock signal and each of the other three clock signals. Periodically, the propagation delay for each link is calculated by taking the average of the phase differences measured by the clock sources driving the two ends of that link. These calculated propagation delays are supplied to each individual clock source, which corrects the phase differences measured by it for the propagation delays.

Abstract: A system for steering mutually phase-locked time-of-day (TOD) clocks in unison to a higher-precision reference clock. Periodically the count stored by a TOD counter responsive to one of the TOD clocks is compared with a reference count to provide an error signal. A proportional correction signal derived from the error signal is applied together with an offset to each of the TOD clocks to adjust the clock frequencies and thereby steer the TOD count toward the reference count. The steering offset is dynamically adjusted in such a manner that, when the offset signal is applied alone as a correction signal, the frequencies of the TOD clocks track that of the reference clock.