Abstract: Techniques for selecting a network communications protocol based on network topology and/or network performance are described. A first application executing on a first computer system obtains a distance characteristic of a network coupling the first computer system to a second computer system. The first application selects a network communications protocol from a plurality of network communications protocols based on the distance characteristic of the network. The first application and the second application connect with the selected network communications protocol. In some embodiments, the distance characteristic of the network may be based on topological or performance characteristics of the network.

Abstract: A system for facilitating virtualization of a heterogeneous processor pool includes a processor allocation component and a hypervisor, each executing on a host computer. The processor allocation component identifies a plurality of physical processors available for computing and determines a set of flags, each of the set of flags identifying a type of functionality provided by each of a subset of the plurality of physical processors. The hypervisor, in communication with the processor allocation component, allocates, to at least one virtual machine, access to one of the subset of the plurality of physical processors.

Abstract: A technique deploys a copy of a disk image from source storage to target storage. The technique involves identifying a particular disk image to be copied from the source storage to the target storage. The technique further involves performing a comparison operation between a first disk image list which lists disk images on the source storage and a second disk image list which lists disk images on the target storage to generate a common disk image list which lists a set of common disk images on both the source and target storage. The technique further involves transferring, from the source storage to the target storage, a set of data portions representing differences between the particular disk image and a common disk image listed on the common disk image list. The set of data portions in combination with the common disk image form a deployed copy on the target storage.

Abstract: A programmable logic apparatus includes a shared memory having a first port, a second port and a third port; a first vital processor interfaced to the first port of the shared memory; and a non-vital communications processor separated from the first vital processor in the programmable logic apparatus and interfaced to the second port of the shared memory. The third port of the shared memory is an external port structured to interface an external second vital processor.

Abstract: A system for serially transmitting vital data includes first and second processors to determine first and second data, a serial communication apparatus to input third data and output serial data based upon the third data, and a memory having first and second ports accessible by the first and second processors, a first memory writable by the first processor and readable by the second processor, and a second memory writable by the second processor and readable by the first processor. The first and second processors store the first and second data in the first and second memories, cooperatively agree that the first data corresponds to the second data, and responsively cause the apparatus to employ: one of the first and second data as the third data, or parts of the first and second data as the third data, and output the serial data based upon the third data.

Abstract: A system for facilitating virtualization of a heterogeneous processor pool includes a processor allocation component and a hypervisor, each executing on a host computer. The processor allocation component identifies a plurality of physical processors available for computing and determines a set of flags, each of the set of flags identifying a type of functionality provided by each of a subset of the plurality of physical processors. The hypervisor, in communication with the processor allocation component, allocates, to at least one virtual machine, access to one of the subset of the plurality of physical processors.

Abstract: A system for facilitating virtualization of a heterogeneous processor pool includes a processor allocation component and a hypervisor, each executing on a host computer. The processor allocation component identifies a plurality of physical processors available for computing and determines a set of flags, each of the set of flags identifying a type of functionality provided by each of a subset of the plurality of physical processors. The hypervisor, in communication with the processor allocation component, allocates, to at least one virtual machine, access to one of the subset of the plurality of physical processors.

Abstract: An output apparatus includes a first source of a first signal having a first state or a different second state; a second source of a second signal having a first state or a different second state; and a circuit structured to output a vital output including a first state when the first state of the first signal corresponds to the first state of the second signal and, otherwise, including a different second state. At least one of the first signal and the second signal is a static signal. The other one of the first signal having the first state and the second signal having the first state is a dynamic signal. When at least one of the first signal has the different second state of the first signal and the second signal has the different second state of the second signal, the vital output includes the different second state.

Abstract: A programmable logic apparatus includes a shared memory having a first port, a second port and a third port; a first vital processor interfaced to the first port of the shared memory; and a non-vital communications processor separated from the first vital processor in the programmable logic apparatus and interfaced to the second port of the shared memory. The third port of the shared memory is an external port structured to interface an external second vital processor.

Abstract: A technique deploys a copy of a disk image from source storage to target storage. The technique involves identifying a particular disk image to be copied from the source storage to the target storage. The technique further involves performing a comparison operation between a first disk image list which lists disk images on the source storage and a second disk image list which lists disk images on the target storage to generate a common disk image list which lists a set of common disk images on both the source and target storage. The technique further involves transferring, from the source storage to the target storage, a set of data portions representing differences between the particular disk image and a common disk image listed on the common disk image list. The set of data portions in combination with the common disk image form a deployed copy on the target storage.

Abstract: A system for serially transmitting vital data includes first and second processors to determine first and second data, a serial communication apparatus to input third data and output serial data based upon the third data, and a memory having first and second ports accessible by the first and second processors, a first memory writable by the first processor and readable by the second processor, and a second memory writable by the second processor and readable by the first processor. The first and second processors store the first and second data in the first and second memories, cooperatively agree that the first data corresponds to the second data, and responsively cause the apparatus to employ: one of the first and second data as the third data, or parts of the first and second data as the third data, and output the serial data based upon the third data.

Abstract: An output apparatus includes a first source of a first signal having a first state or a different second state; a second source of a second signal having a first state or a different second state; and a circuit structured to output a vital output including a first state when the first state of the first signal corresponds to the first state of the second signal and, otherwise, including a different second state. At least one of the first signal and the second signal is a static signal. The other one of the first signal having the first state and the second signal having the first state is a dynamic signal. When at least one of the first signal has the different second state of the first signal and the second signal has the different second state of the second signal, the vital output includes the different second state.

Abstract: A processor includes a first field programmable gate array (FPGA) having a first central processing unit (CPU) core programmed to perform a first function, and first programmable hardware logics (PHLs) programmed to perform a second function. A second FPGA includes a second CPU core programmed to perform a third function, and second PHLs programmed to perform a fourth function. A communication interface is between the first and second CPU cores. The first and second FPGAs are diverse. A portion of the first function communicates first information from the first CPU core to the second CPU core through the interface. A portion of the third function communicates second information from the second CPU core to the first CPU core through the interface, and, otherwise, the first function is substantially the same as the third function. The second function is substantially the same as the fourth function.

Abstract: A method for facilitating migration of virtual machines among a plurality of physical machines includes associating a virtual machine with at least one physical resource inaccessible by a first subset of the plurality of physical machines and available to a second subset of the plurality of physical machines, the virtual machine executing on a first physical machine in the second subset of the plurality of physical machines. The method includes receiving a request to migrate the virtual machine to a second physical machine in the plurality of physical machines. The method includes identifying a second physical machine in the second subset of the plurality of physical machines. The method includes migrating the virtual machine to the second physical machine.

Abstract: A system for optimizing configuration of a virtual machine running at least one process includes at least one virtual resource in a virtual machine executing on a computing device, an agent executing within the virtual machine, and a hypervisor. The at least one virtual resource has a configuration parameter. The agent identifies a name of at least one process currently executing on the virtual machine. The hypervisor alters, in response to receiving the identified name from the agent, a value of the configuration parameter.

Abstract: A system for facilitating virtualization of a heterogeneous processor pool includes a processor allocation component and a hypervisor, each executing on a host computer. The processor allocation component identifies a plurality of physical processors available for computing and determines a set of flags, each of the set of flags identifying a type of functionality provided by each of a subset of the plurality of physical processors. The hypervisor, in communication with the processor allocation component, allocates, to at least one virtual machine, access to one of the subset of the plurality of physical processors.

Abstract: A processor includes a first field programmable gate array (FPGA) having a first central processing unit (CPU) core programmed to perform a first function, and first programmable hardware logics (PHLs) programmed to perform a second function. A second FPGA includes a second CPU core programmed to perform a third function, and second PHLs programmed to perform a fourth function. A communication interface is between the first and second CPU cores. The first and second FPGAs are diverse. A portion of the first function communicates first information from the first CPU core to the second CPU core through the interface. A portion of the third function communicates second information from the second CPU core to the first CPU core through the interface, and, otherwise, the first function is substantially the same as the third function. The second function is substantially the same as the fourth function.

Abstract: An automated computing system and method for determining fingering of musical instruments from digitized scored music or tablature. The computerized automated finger finder system and method analyzes a musical composition and determines hand and/or fingering positional information such that the musical composition can be efficiently played on a musical instrument of choice with minimal hand movement. The method and computing system also provide alternate or secondary fingering choices such that the musician can play with a different tonal stylization or with greater or lesser ease depending on his skill level.

Abstract: An automated computing system and method for determining fingering of musical instruments from digitized scored music or tablature. The computerized automated finger finder system and method analyzes a musical composition and determines hand and/or fingering positional information such that the musical composition can be efficiently played on a musical instrument of choice with minimal hand movement. The method and computing system also provide alternate or secondary fingering choices such that the musician can play with a different tonal stylization or with greater or lesser ease depending on his skill level.

Abstract: An automated computing system and method for determining fingering of musical instruments from digitized scored music or tablature. The computerized automated finger finder system and method analyzes a musical composition and determines hand and/or fingering positional information such that the musical composition can be efficiently played on a musical instrument of choice with minimal hand movement. The method and computing system also provide alternate or secondary fingering choices such that the musician can play with a different tonal stylization or with greater or lesser ease depending on his skill level.