Abstract: A method, apparatus and computer program product are provided disable one or more antennas of an antenna array in order to achieve a predefined objective while selectively utilizing the remainder of the antennas of the antenna array. The one or more antennas to be disabled are selected in a manner to avoid appreciable impact to the fidelity of the resulting array radiation pattern. For example, the method, apparatus and computer program product may disable certain antenna elements based upon the distance of the antenna elements from a predefined location relative to the antenna array, such as the distance from the center of the antenna array, and may selectively utilize the remainder of the antenna elements such that an active portion of the antenna array approximates a circular array which results in an array radiation pattern for which the fidelity is maintained.

Abstract: The invention is a combiner and a method for selectively combining modulated signals. The combiner includes a first modulator (12) with a selective input which receives at least one input signal and a first carrier signal and which outputs a first output modulated with the first carrier signal; a second modulator (14) with a selective input which receives at least one input signal and a second carrier signal and which outputs a second output modulated with the second carrier signal; means for combining (24?) the first and second amplified output signals to provide a combined output; and wherein the first and second carrier signals are selectably coherent or incoherent with the selection of first and second coherent carrier signals causing the combined output to comprise a single carrier of higher power and the selection of incoherent carrier signals causing the combined output to comprise two distinguishable carriers of lower power.

Abstract: The invention is a combiner and a method for selectively combining modulated signals. The combiner includes a first modulator (12) with a selective input which receives at least one input signal and a first carrier signal and which outputs a first output modulated with the first carrier signal; a second modulator (14) with a selective input which receives at least one input signal and a second carrier signal and which outputs a second output modulated with the second carrier signal; means for combining (24′) the first and second amplified output signals to provide a combined output; and wherein the first and second carrier signals are selectably coherent or incoherent with the selection of first and second coherent carrier signals causing the combined output to comprise a single carrier of higher power and the selection of incoherent carrier signals causing the combined output to comprise two distinguishable carriers of lower power.

Abstract: A pattern match method is the primary component of any rule-based inference engine or database search method. Equivalence class projection is used in a discrimination match network, such that only equivalence class tokens (and not working memory objects) are propagated down the network, then only the first object which is a member of any specific equivalence class will cause an actual propagation down through the net. Subsequent changes which are either the creation of new objects which are members of a known equivalence class or the removal of any object but the last member of that equivalence class can totally avoid propagation downward in that section of the discrimination network.

Abstract: A compiled, rule-based expert system for a data base. The system incorporates compiled declarations to incorporate the concept of strong typing at compile time. Both data and rules can be declared so as to be accessible from one or more modules, as required. Such a scheme reduces program complexity, reduces program development time, and increases the ease with which rule-based programs may be embedded in procedural programs.

Abstract: A task dispatch system for use in connection with a plurality of digital data processors for processing tasks. The task dispatch system maintains a task identification queue including a plurality of task identification entries defining a series of tasks to be processed during an iteration. A task dispatcher dispatches tasks to the processors in the order defined by the task identification queue. At the end of an iteration, the task dispatcher reorganizes the entries in the task identification queue so as to dispatch one or more tasks, which were completed last during an iteration, at the beginning of a subsequent iteration.

Abstract: A system and method for quickly determining whether a requested object is an ancestor of a particular object where both objects are contained in a single inheritance type hierarchy. The system encodes each object in memory with a binary pattern that indicates the ancestry of the object and a mask which indicates which bits of the binary pattern are significant for determining ancestry. This allows a system, upon receiving a request for an object, to determine in only two steps whether any particular object in memory can satisfy the request as a sub-type of the requested object.

Abstract: The present invention includes an approach to improving run-time performance of rule-based systems. A series of testing element nodes making up a testing element is adapted to a match discrimination network utilized in an expert system to permit scanning of incoming data prior to traversing large segments of the nodes in the match discrimination network. By placing a series of testing element nodes into a traditional match discrimination network, interaction among data objects and nodes of the match discrimination network are minimized.

Abstract: A rule-partitioning system for converting at least a portion of a target expert system program to a rule partitioned RETE network for execution on multiple processors, including a rule partitioning portion for assigning different rules of the target expert system program to different partitions on the basis of previously collected processing statistics and on the use of node sharing; and a compiler for converting the target expert system program to the RETE network, wherein the rules of the RETE network are assigned to the multiple processors in accordance with the partition assignments.

Abstract: A recticular discrimination network utilized in an expert system that permit read procedural attachments on working memory element slots using a gamma memory. The gamma memory is associated with one- or two- input nodes and stores references to the attached WME slot, use of which minimizes computation and interaction among data elements in a RETE-net.

Abstract: A new expert system that facilitates beta-token partitioning of rules in a RETE network. The expert system includes a beta opinion value generating portion that generates, for each node in the RETE network, an opinion value in response to processing statistics. A beta decision value generating portion generates a beta-token partition opinion value for a rule in response to the beta opinion values for nodes in the RETE network defining a rule.

Abstract: A method and system for beta-token partitioning a target expert system program. The target expert system program is first compiled to form a RETE network for execution on a single processor, the compilation including directives for collecting selected processing statistics. The target expert system program is then executed on a single processor, generating during execution processing statistics in connection with each node of the RETE network. The processing statistics are then applied to a programmed neural network to identify nodes in the RETE network for beta-token partitioning, and the target expert system program is then recompiled to form a RETE network for execution on multiple processors, the RETE network being beta-token partitioned at nodes identified by the neural network.

Abstract: A method for operating a parallel processor system implements a beta-partitioning algorithm. According to that method, groups of working memory elements are identified which satisfy each of the conditions of all of several production rules. Then, sequences of sets are formed each corresponding to one of the production rules. The sets represent combinations of working memory elements which satisfy some or all of the conditions for the corresponding production rule. At some point during the formation of sets, the sets are subdivided into relatively equal-size subsets, each of which is assigned to a different processor. Each processor, which previously had been performing the same operations as the other processors, continues processing only its assigned subset.