Abstract: A motor drive circuit for driving an electric motor includes a plurality of driver circuits, each one of the plurality of driver circuit comprising a high side transistor coupled to a low side transistor in a half bridge arrangement, wherein each one of the high side transistors and each one of the low side transistors has a respective control node and respective first and second current passing nodes, wherein the second current passing node of each of the high side transistors is coupled to the first current passing node of a respective one of the low side transistors at a respective junction node, wherein each one of the plurality of driver circuits is operable to drive a respective current out of a respective junction node into a respective winding of the electric motor. The motor drive circuit further includes a capacitor coupled to the first current passing node of each one of the high side transistors, the capacitor operable to hold a capacitor voltage.

Abstract: Methods and associated apparatuses are described herein that provide a tile alternative material. The tile alternative material may be manufactured by providing a substrate that defines a first surface, and a second surface opposite the first surface. The second surface is configured to be secure, via an adhesive or otherwise, to a support surface. The method further includes coating an exterior layer on the first surface of the substrate, and forming a pattern element in the first surface of the substrate. Forming the pattern element includes removing material from the substrate and the coated exterior layer of the first surface to form one or more recessed portions.

Abstract: A semiconductor device and method of making the semiconductor device is described. A semiconductor die can be provided. A polymer layer can be formed over the semiconductor die. A via can be formed in the polymer layer. The polymer layer can be cross-linked in a first process, after forming the via, by exposing the polymer layer to ultraviolet (UV) radiation to form a sidewall of the via with via sidewall slope greater than or equal to 45 degrees and to further form a cross-linked via sidewall surface. The polymer layer can be thermally cured in a second process after the first process, wherein a maximum ramp-up rate from room temperature to a peak temperature of the second process is greater than 10 degrees Celsius per minute.

Abstract: A method of making a semiconductor device may include providing a carrier comprising a semiconductor die mounting site. A build-up interconnect structure may be formed over the carrier. A first portion of a conductive interconnect may be formed over the build-up interconnect structure in a periphery of the semiconductor die mounting site. An etch stop layer and a second portion of the conductive interconnect may be formed over the first portion of the conductive interconnect. A semiconductor die may be mounted to the build-up interconnect at the semiconductor die mounting site. The conductive interconnect and the semiconductor die may be encapsulated with a mold compound. A first end of the conductive interconnect on the second portion of the conductive interconnect may be exposed. The carrier may be removed to expose the build-up interconnect structure. The first portion of the conductive interconnect may be etched to expose the etch stop layer.

Abstract: A method of making a semiconductor device can comprise providing a temporary carrier comprising a semiconductor die mounting site, and forming an insulating layer over the temporary carrier. Conductive pads can be formed within openings in the insulating layer and be positioned both within and without the die mounting area. A backside redistribution layer (RDL) can be formed over the temporary carrier before mounting a semiconductor die at the die mounting site. Conductive interconnects can be formed over the temporary carrier in a periphery of the semiconductor die mounting site. A semiconductor die can be mounted face up to the insulating layer. The conductive interconnects, backside RDL, and semiconductor die can be encapsulated with a mold compound. A build-up interconnect structure can be formed and connected to the semiconductor die and the conductive interconnects. The temporary carrier can be removed and the conductive pads exposed in a grinding process.

Abstract: A regulator moldboard and grader blade assembly includes a moldboard having at least one transversely extending pin, the pin having a notch with a surface inclined toward the moldboard. At least one grader blade has at least one mounting opening having a flared surface complementary to the notch so that the blade is hangable on the pin so that the notch draws the blade against the moldboard as a fastener tightens the blade to the moldboard.

Abstract: A method of making a semiconductor device can include providing a temporary carrier with a semiconductor die mounting site, and forming conductive interconnects over the temporary carrier in a periphery of the semiconductor die mounting site. A semiconductor die can be mounted at the semiconductor die mounting site. The conductive interconnects and semiconductor die can be encapsulated with mold compound. First ends of the conductive interconnects can be exposed. The temporary carrier can be removed to expose second ends of the conductive interconnects opposite the first ends of the conductive interconnects. The conductive interconnects can be etched to recess the second ends of the conductive interconnects with respect to the mold compound. The conductive interconnects can comprise a first portion, a second portion, and an etch stop layer disposed between the first portion and the second portion.

Abstract: A method of removing at least a portion of a layer of material from over a semiconductor substrate that can include dispensing an etching solution over the semiconductor substrate to form a pool of etching solution on the layer of material, wherein a footprint of the pool of etching solution is less than a footprint of the semiconductor substrate. The pool of etching solution and the semiconductor substrate can be moved with respect to each other. A pool boundary of the pool of etching solution can be defined on the semiconductor substrate with at least one air-knife such that the pool of etching solution etches the layer of material over the semiconductor substrate within the footprint of the pool of etching solution. The etching solution and at least a portion of the layer of material etched by the etching solution can be removed with the at least one air-knife.

Abstract: A method of making a semiconductor device can comprise providing a temporary carrier comprising a semiconductor die mounting site, and forming an insulating layer over the temporary carrier. Conductive pads can be formed within openings in the insulating layer and be positioned both within and without the die mounting area. A backside redistribution layer (RDL) can be formed over the temporary carrier before mounting a semiconductor die at the die mounting site. Conductive interconnects can be formed over the temporary carrier in a periphery of the semiconductor die mounting site. A semiconductor die can be mounted face up to the insulating layer. The conductive interconnects, backside RDL, and semiconductor die can be encapsulated with a mold compound. A build-up interconnect structure can be formed and connected to the semiconductor die and the conductive interconnects. The temporary carrier can be removed and the conductive pads exposed in a grinding process.

Abstract: A method of removing at least a portion of a layer of material from over a semiconductor substrate that can include dispensing an etching solution over the semiconductor substrate to form a pool of etching solution on the layer of material, wherein a footprint of the pool of etching solution is less than a footprint of the semiconductor substrate. The pool of etching solution and the semiconductor substrate can be moved with respect to each other. A pool boundary of the pool of etching solution can be defined on the semiconductor substrate with at least one air-knife such that the pool of etching solution etches the layer of material over the semiconductor substrate within the footprint of the pool of etching solution. The etching solution and at least a portion of the layer of material etched by the etching solution can be removed with the at least one air-knife.

Abstract: A method of making a semiconductor device can include providing a temporary carrier with a semiconductor die mounting site, and forming conductive interconnects over the temporary carrier in a periphery of the semiconductor die mounting site. A semiconductor die can be mounted at the semiconductor die mounting site. The conductive interconnects and semiconductor die can be encapsulated with mold compound. First ends of the conductive interconnects can be exposed. The temporary carrier can be removed to expose second ends of the conductive interconnects opposite the first ends of the conductive interconnects. The conductive interconnects can be etched to recess the second ends of the conductive interconnects with respect to the mold compound. The conductive interconnects can comprise a first portion, a second portion, and an etch stop layer disposed between the first portion and the second portion.

Abstract: A method of removing at least a portion of a layer of material from over a semiconductor substrate that can include dispensing an etching solution over the semiconductor substrate to form a pool of etching solution on the layer of material, wherein a footprint of the pool of etching solution is less than a footprint of the semiconductor substrate. The pool of etching solution and the semiconductor substrate can be moved with respect to each other. A pool boundary of the pool of etching solution can be defined on the semiconductor substrate with at least one air-knife such that the pool of etching solution etches the layer of material over the semiconductor substrate within the footprint of the pool of etching solution. The etching solution and at least a portion of the layer of material etched by the etching solution can be removed with the at least one air-knife.

Abstract: A method of making a semiconductor device can include providing a temporary carrier with a semiconductor die mounting site, and forming conductive interconnects over the temporary carrier in a periphery of the semiconductor die mounting site. A semiconductor die can be mounted at the semiconductor die mounting site. The conductive interconnects and semiconductor die can be encapsulated with mold compound. First ends of the conductive interconnects can be exposed. The temporary carrier can be removed to expose second ends of the conductive interconnects opposite the first ends of the conductive interconnects. The conductive interconnects can be etched to recess the second ends of the conductive interconnects with respect to the mold compound. The conductive interconnects can comprise a first portion, a second portion, and an etch stop layer disposed between the first portion and the second portion.

Abstract: A regulator moldboard and grader blade assembly is provided and includes a moldboard having at least one transversely extending pin, the pin having a notch with a surface inclined toward the moldboard. At least one grader blade has at least one mounting opening having a flared surface complementary to the notch so that the blade is hangable on the pin so that the notch draws the blade against the moldboard as a fastener tightens the blade to the moldboard.

Abstract: A semiconductor device and method of making the semiconductor device is described. A semiconductor die can be provided. A polymer layer can be formed over the semiconductor die. A via can be formed in the polymer layer. The polymer layer can be cross-linked in a first process, after forming the via, by exposing the polymer layer to ultraviolet (UV) radiation to form a sidewall of the via with via sidewall slope greater than or equal to 45 degrees and to further form a cross-linked via sidewall surface. The polymer layer can be thermally cured in a second process after the first process, wherein a maximum ramp-up rate from room temperature to a peak temperature of the second process is greater than 10 degrees Celsius per minute.

Abstract: A rail fastener orienter is provided for orienting rail fasteners to a desired orientation, the fasteners having a head, an opposite tip and a shank connecting the head to the tip, and being sequentially provided to the orienter in one of a head right, head left, head up and head down orientation. The orienter includes a frame having an upper end and an opposite lower end, and defining a track with an inlet adjacent the upper end, and an outlet adjacent the lower end, the track dimensioned for slidingly and rotatingly accommodating the shank. At least one stage holder is provided for accommodating the fastener in the track as the head is at least partially engaged by at least one bumper for repositioning to a desired one of the orientations, such that the fastener reaches the outlet in the desired orientation after axial rotation.

Abstract: A method to perform signal validation for either reactor fixed incore detectors and/or core exit thermocouples to enhance core monitoring systems. The method uses a combination of both measured sensor signals and expected signal responses to develop a ratio of measured to expected signals. The ratios are evaluated by determining the expected ratios for each detector based on the behavior of the remaining collection of detectors, taking into account the geometry/location of the other detectors. The method also provides for automatic removal of invalid detectors from the core power distribution determination if sufficient detectors remain on line to adequately characterize the core's power distribution.

Abstract: A semiconductor device and method of making the semiconductor device is described. A semiconductor die is provided. A polymer layer is formed over the semiconductor die. A via is formed in the polymer layer. The polymer layer is crosslinked in a first process. The polymer layer is thermally cured in a second process. The polymer layer can comprise polybenzoxazoles (PBO), polyimide, benzocyclobutene (BCB), or siloxane-based polymers. A surface of the polymer layer can be crosslinked by a UV bake to control a slope of the via during subsequent curing. The second process can further comprise thermally curing the polymer layer using conduction, convection, infrared, or microwave heating. The polymer layer can be thermally cured by increasing a temperature of the polymer at a rate greater than or equal to 10 degrees Celsius per minute, and can be completely cured in less than or equal to 60 minutes.

Abstract: An apparatus for driving a motor comprises a drive signal generation circuit configured to produce pulses on a pulse-width modulated drive signal in response to a control signal. A detection circuit is coupled to receive a commutation signal from the motor to monitor the speed of the motor. A control signal generation circuit is configured to dynamically generate the control signal so that a frequency of pulse-width modulated drive signal corresponds with the duration of the phase of the motor, so as to reduce the occurrence of an incomplete pulse on the drive signal. Methods for driving a motor are also disclosed.