Abstract: Goggles and eyeglasses worn in winter weather conditions are subject to fogging. A method of preventing condensation from forming on goggles and on eyeglasses worn under goggles is provided. The method involves using a fan to exhaust air from the air space between the goggles and a user's face. Continuous operation of the fan is designed to be inaudible and effective to prevent fogging. The method can involve use of a goggle ventilation design which improves wearer comfort. The goggle can also clear fogging which has occurred while the fan is not in operation.

Abstract: Eyeglasses worn in winter weather conditions are subject to fogging due to condensation of water vapor. A method of removing condensation from eyeglasses is provided. The method involves heating the lenses of the eyeglasses, by making the lenses a part of an electrical circuit. Electric current is supplied to the electric circuit from a power source external to the eyeglasses. The size and weight of the power source may be minimized by utilizing a timer or a power regulator. A smaller power source is also made possible by selectively heating the lenses, applying more power in the area of the lenses most likely to experience fogging.

Abstract: The invented technique permits the gate length to equal the channel length: source/drain regions are self-aligned and non-overlapping with respect to their gate electrode. The non-overlapping feature, along with other optimized device characteristics, are generally provided by defining a gate electrode over a substrate, forming an implant mask of dielectric, for example, on the sides of the gate electrode, and implanting a source/drain region such that the implant mask shields a portion of the substrate from implantation to provide a gap between a side edge of the gate electrode and the implanted regions. The source/drain region is then heat driven until its side edge is substantially aligned with the edge of the gate electrode. Self-aligned source/drain contacts are also provided using the implant mask to isolate the gate electrode from the contacts and interconnects.

Abstract: A method is described for fabricating MOS devices of the type found in very large scale integrated circuits. According to the method described herein, various gate oxides and insulating layers are fabricated independently of each other in order to independently tailor their thicknesses and thereby provide improved isolation between gate electrodes and interconnects, and independently controllable operating characteristics for multiple gate electrode structures. The fabrication of a dynamic RAM memory cell, an overlapping gate CCD device and a self-aligned MNOS transistor cell are described using the disclosed method.