Patents by Inventor William F. Jergens

William F. Jergens has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5862394
    Abstract: This is a system and method of intelligently terminating power to a computing device. The system may comprise: a processing device; a power source connected to the processing device; a switch connected to the power source; and a control system run by the processing device and connected to the power source and the switch. In addition, the system may include a deadman timer which provides a fail-safe operation. Further, the system may include a method and apparatus for executing an orderly shut down procedure for software and hardware. Moreover, the system could be tied to a thermal and/or power management system. Additionally, the system could initiate an orderly shut down of peripheral devices connected to the system serially or by parallel connections. Other devices, systems and methods are also described.
    Type: Grant
    Filed: March 21, 1996
    Date of Patent: January 19, 1999
    Assignee: Texas Instruments Incorporated
    Inventors: LaVaughn F. Watts, William F. Jergens
  • Patent number: 4092709
    Abstract: A multiple output switching regulator power supply operates as a self-oscillating circuit with a light weight ferrite core transformer and a sense winding used exclusively for voltage regulation purposes. A power transistor switch is employed to selectively connect the transformer primary across a DC source of power to provide energy storage when the switch is closed and to provide energy transfer when the switch is open, by way of transformer flyback. The power transistor switch is controlled by a feedback circuit which includes a current sink connected to selectively divert current away from the base of the power transistor switch and a timing circuit for controlling the operation of the current sink. A capacitor, connected across the sense winding is monitored by a high gain voltage comparison circuit which activates the timing circuit in dependence on the voltage variation on the capacitor.
    Type: Grant
    Filed: September 24, 1976
    Date of Patent: May 30, 1978
    Assignee: Texas Instruments Incorporated
    Inventors: William C. Voigt, William F. Jergens