Patents by Inventor William F. Van Duyne

William F. Van Duyne has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230251786
    Abstract: In some aspects, an apparatus for encoding data for delivery to or for decoding data retrieved from a storage medium comprises a memory device and at least one hardware processor. The memory device is configured to store at least one parameter associated with at least one cryptographic protocol, the at least one parameter comprising one or more of a first cryptographic scheme, a first cryptographic key operation, a first cryptographic key length, and first cipher directives. The hardware processor is configured to generate a first frame comprising a first field for one parameter selected from the first cryptographic scheme, the first cryptographic key operation, the first cryptographic key length, and the first cipher directives and excluding fields for non-selected parameters, wherein the first frame is associated with the data delivered to or retrieved from the storage medium.
    Type: Application
    Filed: April 14, 2023
    Publication date: August 10, 2023
    Inventors: William F. VAN DUYNE, William SPAZANTE, Gwain BAYLEY
  • Patent number: 11662924
    Abstract: In some aspects, an apparatus for encoding data for delivery to or for decoding data retrieved from a storage medium comprises a memory device and at least one hardware processor. The memory device is configured to store at least one parameter associated with at least one cryptographic protocol, the at least one parameter comprising one or more of a first cryptographic scheme, a first cryptographic key operation, a first cryptographic key length, and first cipher directives. The hardware processor is configured to generate a first frame comprising a first field for one parameter selected from the first cryptographic scheme, the first cryptographic key operation, the first cryptographic key length, and the first cipher directives and excluding fields for non-selected parameters, wherein the first frame is associated with the data delivered to or retrieved from the storage medium.
    Type: Grant
    Filed: May 13, 2022
    Date of Patent: May 30, 2023
    Assignee: SeaPort, Inc.
    Inventors: William F. Van Duyne, William Spazante, Gwain Bayley
  • Publication number: 20220372790
    Abstract: Disclosed is a Sleeve Stop Lock that is a portable, removable, non-damaging door lock that can be used to secure almost any inward swinging door from the outside. The apparatus consists of three components: a sleeve, a stop, and a lock. The “sleeve” component fits around the edge of a door. It is installed while a door is open. With the door closed, the “stop” makes contact with the door frame once attached to the sleeve thus preventing the door from swinging inward. The “lock” mechanism then securely binds all of the components together. The combination of these three elements (sleeve, stop and lock) prevent potential intruders (including housekeeping) from entering and invading the privacy of an unoccupied room.
    Type: Application
    Filed: May 24, 2021
    Publication date: November 24, 2022
    Inventors: William F. Van Duyne, Kannon Kobleur
  • Publication number: 20220269429
    Abstract: In some aspects, an apparatus for encoding data for delivery to or for decoding data retrieved from a storage medium comprises a memory device and at least one hardware processor. The memory device is configured to store at least one parameter associated with at least one cryptographic protocol, the at least one parameter comprising one or more of a first cryptographic scheme, a first cryptographic key operation, a first cryptographic key length, and first cipher directives. The hardware processor is configured to generate a first frame comprising a first field for one parameter selected from the first cryptographic scheme, the first cryptographic key operation, the first cryptographic key length, and the first cipher directives and excluding fields for non-selected parameters, wherein the first frame is associated with the data delivered to or retrieved from the storage medium.
    Type: Application
    Filed: May 13, 2022
    Publication date: August 25, 2022
    Inventors: William F. VAN DUYNE, William SPAZANTE, Gwain BAYLEY
  • Patent number: 11334264
    Abstract: In some aspects, an apparatus for encoding data for delivery to or for decoding data retrieved from a storage medium comprises a memory device and at least one hardware processor. The memory device is configured to store at least one parameter associated with at least one cryptographic protocol, the at least one parameter comprising one or more of a first cryptographic scheme, a first cryptographic key operation, a first cryptographic key length, and first cipher directives. The hardware processor is configured to generate a first frame comprising a first field for one parameter selected from the first cryptographic scheme, the first cryptographic key operation, the first cryptographic key length, and the first cipher directives and excluding fields for non-selected parameters, wherein the first frame is associated with the data delivered to or retrieved from the storage medium.
    Type: Grant
    Filed: September 12, 2019
    Date of Patent: May 17, 2022
    Assignee: SEAPORT, INC.
    Inventors: William F. Van Duyne, William Spazante, Gwain Bayley
  • Patent number: 11126356
    Abstract: In some aspects, an apparatus for encoding data for transmission by a transmitter device to a receiver device having an initial common cryptographic key with the apparatus comprises a memory device and a hardware processor. The memory device is configured to store a plurality of parameters associated with a plurality of cryptographic protocols, the plurality of parameters comprising the initial common cryptographic key. The hardware processor is configured to generate a frame comprising a plurality of fields defining instructions related to a first cryptographic scheme, a first cipher directive, a first cryptographic key operation, and/or a first cryptographic key length, that are derived from the plurality of parameters for use in a subsequent communication session with the receiver device.
    Type: Grant
    Filed: September 12, 2019
    Date of Patent: September 21, 2021
    Assignee: SeaPort, Inc.
    Inventor: William F. Van Duyne
  • Patent number: 11119670
    Abstract: In some aspects, an apparatus for encoding a stream of data for transmission to a receiver device comprises a memory device and a hardware processor. The memory device is a memory device configured to store at least one parameter associated with at least one cryptographic protocol, the at least one parameter identifying one or more cipher directives from a plurality of cipher directives including an exclusive-OR (XOR) function and a table lookup function. The hardware processor is configured to generate, for transmission to the receiver device, a frame comprising a first field identifying a custom or non-custom cryptographic scheme and a second field identifying a first cipher directive of the plurality of cipher directives.
    Type: Grant
    Filed: September 12, 2019
    Date of Patent: September 14, 2021
    Assignee: SeaPort, Inc.
    Inventors: Gwain Bayley, William F. Van Duyne, William Spazante
  • Patent number: 11054999
    Abstract: In some aspects, an apparatus for encoding data for transmission to a receiver device having an initial common cryptographic key with the apparatus comprises a memory device and a hardware processor. The memory device is configured to store a plurality of parameters associated with a plurality of cryptographic protocols, the plurality of parameters comprising the initial common cryptographic key. The hardware processor is configured to generate a frame comprising a plurality of fields defining instructions related to one or more of a first cryptographic scheme, a first cryptographic key operation, and a first cryptographic key length that are derived from the plurality of parameters for use in a subsequent communication session with the receiver device.
    Type: Grant
    Filed: September 12, 2019
    Date of Patent: July 6, 2021
    Assignee: SeaPort, Inc.
    Inventor: William F. Van Duyne
  • Publication number: 20210177074
    Abstract: WOSPP (WorkOut with Snaps and Palm Protection) is an alternative workout glove design that is compact in size, fits around one or more fingers, is machine washable/dryable, and can be attached to an article of clothing such as workout shorts, or other items such as a workout towel. The WOSPP attaches to the various articles or other items through a variety of methods, such as snaps. When the article of clothing or other item is washed, the WOSPP is also cleaned. A portion of the WOSPP design provides palm protection against calluses in addition to grip support.
    Type: Application
    Filed: November 17, 2020
    Publication date: June 17, 2021
    Inventor: William F. Van Duyne
  • Publication number: 20200092079
    Abstract: In some aspects, an apparatus for encoding a stream of data for transmission to a receiver device comprises a memory device and a hardware processor. The memory device is a memory device configured to store at least one parameter associated with at least one cryptographic protocol, the at least one parameter identifying one or more cipher directives from a plurality of cipher directives including an exclusive-OR (XOR) function and a table lookup function. The hardware processor is configured to generate, for transmission to the receiver device, a frame comprising a first field identifying a custom or non-custom cryptographic scheme and a second field identifying a first cipher directive of the plurality of cipher directives.
    Type: Application
    Filed: September 12, 2019
    Publication date: March 19, 2020
    Inventors: Gwain Bayley, William F. Van Duyne, William Spazante
  • Publication number: 20200089419
    Abstract: In some aspects, an apparatus for encoding data for delivery to or for decoding data retrieved from a storage medium comprises a memory device and at least one hardware processor. The memory device is configured to store at least one parameter associated with at least one cryptographic protocol, the at least one parameter comprising one or more of a first cryptographic scheme, a first cryptographic key operation, a first cryptographic key length, and first cipher directives. The hardware processor is configured to generate a first frame comprising a first field for one parameter selected from the first cryptographic scheme, the first cryptographic key operation, the first cryptographic key length, and the first cipher directives and excluding fields for non-selected parameters, wherein the first frame is associated with the data delivered to or retrieved from the storage medium.
    Type: Application
    Filed: September 12, 2019
    Publication date: March 19, 2020
    Inventors: William F. Van Duyne, William Spazante, Gwain Bayley
  • Publication number: 20200092728
    Abstract: In some aspects, an apparatus for encoding data for transmission to a receiver device having an initial common cryptographic key with the apparatus comprises a memory device and a hardware processor. The memory device is configured to store a plurality of parameters associated with a plurality of cryptographic protocols, the plurality of parameters comprising the initial common cryptographic key. The hardware processor is configured to generate a frame comprising a plurality of fields defining instructions related to one or more of a first cryptographic scheme, a first cryptographic key operation, and a first cryptographic key length that are derived from the plurality of parameters for use in a subsequent communication session with the receiver device.
    Type: Application
    Filed: September 12, 2019
    Publication date: March 19, 2020
    Inventor: William F. Van Duyne
  • Publication number: 20200092715
    Abstract: In some aspects, an apparatus for encoding data for transmission by a transmitter device to a receiver device having an initial common cryptographic key with the apparatus comprises a memory device and a hardware processor. The memory device is configured to store a plurality of parameters associated with a plurality of cryptographic protocols, the plurality of parameters comprising the initial common cryptographic key. The hardware processor is configured to generate a frame comprising a plurality of fields defining instructions related to a first cryptographic scheme, a first cipher directive, a first cryptographic key operation, and/or a first cryptographic key length, that are derived from the plurality of parameters for use in a subsequent communication session with the receiver device.
    Type: Application
    Filed: September 12, 2019
    Publication date: March 19, 2020
    Inventor: William F. Van Duyne
  • Publication number: 20150371763
    Abstract: Some examples describe a first helical electromagnetic coil of a transformer. In some instances, at least a portion of the first helical electromagnetic coil is inside a first semi-conductive substrate. Further, in some examples, the first helical electromagnetic coil has a shape with an internal space. Further, some examples describe a second helical electromagnetic coil of the transformer. In some instances, at least a portion of the second helical electromagnetic coil is nested within the internal space of the first helical electromagnetic coil. Further, in some examples, the at least the portion of the second electromagnetic coil is inside the first semi-conductive substrate.
    Type: Application
    Filed: June 20, 2014
    Publication date: December 24, 2015
    Inventors: Rachel Gordin, WAN NI, Michael J. Shapiro, William F. Van Duyne
  • Publication number: 20150371764
    Abstract: Some examples describe a first helical structure of an electromagnetic inductor coil. In some examples, at least a portion of the first helical structure of the electromagnetic inductor coil is inside a first substrate. Further, some examples describe a second helical structure of the electromagnetic inductor coil. In some instances, at least a portion of the second helical structure is nested within the first helical structure of the electromagnetic inductor coil. Further, in some examples, the at least the portion of the second helical structure is inside the first substrate.
    Type: Application
    Filed: June 20, 2014
    Publication date: December 24, 2015
    Inventors: Rachel Gordin, WAN NI, Michael J. Shapiro, William F. Van Duyne
  • Patent number: 9058458
    Abstract: Serializer-deserializer (SERDES) and integrated circuit package including a package substrate, first and second SERDES dies having a SERDES circuit, and a logic die having a logic circuit. The SERDES circuit communicatively connected to the package substrate. The first and second SERDES dies positioned adjacent, in a plane, and disposed on the package substrate. The logic circuit communicatively connected to the SERDES circuit and to the package substrate. The logic die stacked vertically and disposed on the first and second SERDES dies. A method of assembling a SERDES and integrated circuit package including providing a SERDES structure selected from a menu of SERDES die and SERDES circuit combinations. A design structure of a SERDES and integrated circuit package including a package substrate, first and second SERDES dies having a SERDES circuit, and a logic die having a logic circuit. The SERDES circuit communicatively connected to the package substrate.
    Type: Grant
    Filed: January 9, 2014
    Date of Patent: June 16, 2015
    Assignee: International Business Machines Corporation
    Inventors: Michael J. Shapiro, William F. Van Duyne
  • Patent number: 9059163
    Abstract: Serializer-deserializer (SERDES) and integrated circuit package including a package substrate, first and second SERDES dies having a SERDES circuit, and a logic die having a logic circuit. The SERDES circuit communicatively connected to the package substrate. The first and second SERDES dies positioned adjacent, in a plane, and disposed on the package substrate. The logic circuit communicatively connected to the SERDES circuit and to the package substrate. The logic die stacked vertically and disposed on the first and second SERDES dies. A method of assembling a SERDES and integrated circuit package including providing a SERDES structure selected from a menu of SERDES die and SERDES circuit combinations. A design structure of a SERDES and integrated circuit package including a package substrate, first and second SERDES dies having a SERDES circuit, and a logic die having a logic circuit. The SERDES circuit communicatively connected to the package substrate.
    Type: Grant
    Filed: October 17, 2013
    Date of Patent: June 16, 2015
    Assignee: International Business Machines Corporation
    Inventors: Michael J. Shapiro, William F. Van Duyne
  • Publication number: 20150109739
    Abstract: Serializer-deserializer (SERDES) and integrated circuit package including a package substrate, first and second SERDES dies having a SERDES circuit, and a logic die having a logic circuit. The SERDES circuit communicatively connected to the package substrate. The first and second SERDES dies positioned adjacent, in a plane, and disposed on the package substrate. The logic circuit communicatively connected to the SERDES circuit and to the package substrate. The logic die stacked vertically and disposed on the first and second SERDES dies. A method of assembling a SERDES and integrated circuit package including providing a SERDES structure selected from a menu of SERDES die and SERDES circuit combinations. A design structure of a SERDES and integrated circuit package including a package substrate, first and second SERDES dies having a SERDES circuit, and a logic die having a logic circuit. The SERDES circuit communicatively connected to the package substrate.
    Type: Application
    Filed: October 17, 2013
    Publication date: April 23, 2015
    Applicant: International Business Machines Corporation
    Inventors: Michael J. Shapiro, William F. Van Duyne
  • Publication number: 20150113495
    Abstract: Serializer-deserializer (SERDES) and integrated circuit package including a package substrate, first and second SERDES dies having a SERDES circuit, and a logic die having a logic circuit. The SERDES circuit communicatively connected to the package substrate. The first and second SERDES dies positioned adjacent, in a plane, and disposed on the package substrate. The logic circuit communicatively connected to the SERDES circuit and to the package substrate. The logic die stacked vertically and disposed on the first and second SERDES dies. A method of assembling a SERDES and integrated circuit package including providing a SERDES structure selected from a menu of SERDES die and SERDES circuit combinations. A design structure of a SERDES and integrated circuit package including a package substrate, first and second SERDES dies having a SERDES circuit, and a logic die having a logic circuit. The SERDES circuit communicatively connected to the package substrate.
    Type: Application
    Filed: January 9, 2014
    Publication date: April 23, 2015
    Applicant: International Business Machines Corporation
    Inventors: Michael J. Shapiro, William F. Van Duyne
  • Patent number: D1022398
    Type: Grant
    Filed: November 17, 2020
    Date of Patent: April 16, 2024
    Inventor: William F. Van Duyne