Abstract: The present disclosure relates to a computing platform for preventing side channel attacks comprising a memory module configured for storing data of a computer program and program instructions; a pipeline having a plurality of stages, said plurality of stages being configurated for transferring electrical signal via a on-chip interconnect bus; a CPU configured for executing said computer program; said program instructions being decoded by one stage of said plurality of stages; each stage of said pipeline having at least one combinatorial module, said at least one combinatorial module having a plurality of data input and a plurality control input and at least a data output; each program instruction traveling from left to right through said pipeline, and within each stage can activate one or more or none of said at least one combinatorial module.

Abstract: The present disclosure relates to a computing platform and a relative computer implemented method for synchronize the prototype execution and simulation of hardware devices. The computing platform (1) comprises a debugger module (2), a memory (3) for storing instructions and data of a computer program; a CPU (4) configured for executing said computer program; said debugger module (2) being in signal communication with said memory (3) through a first debugger channel (dbg2Mem).

Abstract: It is disclosed an electronic device to control temperature and computing performance of at least one processing unit. An event generation module is configured to receive an internal temperature signal representative of the internal temperature of the processing unit and to generate an event signal indicating the need to recalculate the value of at least one control signal controlling the computing performance of the processing unit and its dissipated thermal power. An event management module is configured to receive the event signal, calculate a control action for controlling the computing performance of the processing unit and the dissipated thermal power thereof, and generate a first candidate driving signal carrying said control action. An operating module is configured to receive the first candidate driving signal and to generate the at least one control signal as a function of the first candidate driving signal.

Abstract: It is disclosed an electronic device to control temperature and computing performance of at least one processing unit. An event generation module is configured to receive an internal temperature signal representative of the internal temperature of the processing unit and to generate an event signal indicating the need to recalculate the value of at least one control signal controlling the computing performance of the processing unit and its dissipated thermal power. An event management module is configured to receive the event signal, calculate a control action for controlling the computing performance of the processing unit and the dissipated thermal power thereof, and generate a first candidate driving signal carrying said control action. An operating module is configured to receive the first candidate driving signal and to generate the at least one control signal as a function of the first candidate driving signal.

Abstract: An embodiment of a method and system are provided for managing both system resources and power consumption of a computer system, involving different layers of the system: an application layer, a middle layer where the operating system is running and where a power manager is provided, and a hardware layer used for communicating with the hardware devices. Hardware devices have different operating modes which provide distinct trade-offs between performances and power consumption. Performance requirements defined at the level of the application layer, as well as the device power status of the system, set constraints on the system resources. The middle layer power manager may be in charge of retrieving performance requirements in form of constraints set on system parameters, aggregating these constraints opportunely and communicating corresponding information to the device drivers which may then select a best operating mode.

Abstract: An embodiment of a method and system are provided for managing both system resources and power consumption of a computer system, involving different layers of the system: an application layer, a middle layer where the operating system is running and where a power manager is provided, and a hardware layer used for communicating with the hardware devices. Hardware devices have different operating modes which provide distinct trade-offs between performances and power consumption. Performance requirements defined at the level of the application layer, as well as the device power status of the system, set constraints on the system resources. The middle layer power manager may be in charge of retrieving performance requirements in form of constraints set on system parameters, aggregating these constraints opportunely and communicating corresponding information to the device drivers which may then select a best operating mode.

Abstract: An encoder/decoder architecture for buses, capable of minimizing power consumption by reducing the switching activity, generates, from an input information value relating to a given instant, a corresponding current output value on encoded bus lines relating to the same given instant. The architecture including storage device for storing respective preceding values of input information and output information relating to instants preceding the aforesaid given instant. A prediction block generates, from the preceding value of input information, an estimate of the current input information value. A decorrelation block decorrelates the current input information value with respect to the said estimate. A selection block selects as the current output value one out of the current input information value, the result of the decorrelation implemented by the decorrelation block or the preceding output value.