Patents by Inventor William G. Holland

William G. Holland has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6049842
    Abstract: A method for transferring data between non-contiguous buffers in a memory and an I/O device via a system I/O bus uses a descriptor queue stored in memory. Each descriptor points to a buffer and includes the length of the buffer. The I/O device is provided with the base address of the queue, the length of the queue and a current address which at initialization is the same as the base address. When data is to be transferred a device driver located in the processor sends the number of available descriptors (DescrEnq) to the I/O device which accesses the descriptors individually or in burst mode to gain access to the data buffers identified by the descriptors.
    Type: Grant
    Filed: May 1, 1997
    Date of Patent: April 11, 2000
    Assignee: International Business Machines Corporation
    Inventors: Henry Michael Garrett, William G. Holland, Joseph Franklin Logan, Joseph Gerald McDonald, John Kenneth Stacy
  • Patent number: 5905913
    Abstract: An interrupt mechanism associated with a peripheral devise is connected to a processor by an interrupt driven I/O bus. The mechanism includes an n input System Interrupt Status Register (SISR) which collects up to n different interrupts from the device during a predetermined time period. Gate and timing circuits under control of signals provided by the processor regulate the frequency of the interrupts thus reducing the number of interrupt operations required to service the device.
    Type: Grant
    Filed: April 24, 1997
    Date of Patent: May 18, 1999
    Assignee: International Business Machines Corporation
    Inventors: Henry Michael Garrett, William G. Holland, Joseph Franklin Logan, Joseph Gerald McDonald
  • Patent number: 5608876
    Abstract: An adapter or add-in card for use in a peripheral component interconnect (PCI) computer includes a universal module which couples the card to the PCI bus. The module includes a set of selectively programmable configuration registers which are loaded by a microprocessor on the adapter. A circuit arrangement on the module issues a command which inhibits the PCI processor from accessing the configuration registers until fully loaded. Another circuit arrangement presents the Expansion ROM base address register as a `read/write` register or a read only register with all bits set to logical "0 " to the PCI computer. If the Expansion ROM base address register is presented as a read only register with all bits set to "0 ", the PCI computer concludes that no Expansion ROM exists on the add-in card, and its contents are not shadowed into the memory of the PCI computer. This disabling of the Expansion ROM causes memory space to be conserved in the computer.
    Type: Grant
    Filed: May 22, 1995
    Date of Patent: March 4, 1997
    Assignee: International Business Machines Corporation
    Inventors: Ariel Cohen, William G. Holland, Joseph F. Logan, Avi Parash