Abstract: Systems, methods and computer program products for automatically triggering operations on a queue pair (QP). Methods include receiving a command at a remote direct memory access (RDMA) capable adapter. A trigger event element associated with the command is determined. The trigger event element is posted on a triggered QP. A triggeror element on a triggeror QP is posted, where the triggeror QP includes a reference to the triggered QP. A notification that the triggeror element has completed is received. The trigger event element is automatically initiated in response to receiving the notification.

Abstract: An apparatus and program storage device for maintaining data is provided that includes receiving primary data at a first node, receiving mirrored data from a second and third node at the first node, and mirroring data received at the first node to a second and third node.

Abstract: A method for maintaining data is provided that includes receiving primary data at a first node, receiving mirrored data from a second and third node at the first node, and mirroring data received at the first node to a second and third node.

Abstract: An array controller implemented method and apparatus are provided for dynamically expanding a redundant array of independent disk drives (RAID) by adding any number M of direct access storage devices (DASDs) to the original array while maintaining data availability and system performance to an array user. A logical to physical address map (LPAM) of original array (LPAM-O) and of expanded array (LPAM-E) and initial array state information are established and stored. A selected domain of data blocks is defined for deferred access to an array user. Then the selected domain of data blocks is read using LPAM-O. Parity information is calculated with the read data of the selected domain of data blocks. Then the read selected domain of data blocks and the calculated parity information are written to the expanded array using LPAM-E.

Abstract: A method and apparatus for performing data base searches in which the host processor and main memory are free for other processing tasks between the time that the host processor requests the search until the search results are reported back to the host processor. To commence the search, an input/output controller communicates from the host processor to a record scan circuit values of a skip length, a key length and a data length. While data records are received serially from disk files, within each data record, a length of data equal to the specified skip length is initially skipped. Following this, a search argument is compared with a length of data specified by the key length value. This comparison operation is alternated with skipping of data specified by the data length value until the end of the record is reached or until a specified number of comparisons has taken place. The data record is stored as it is received from the files.