Patents by Inventor William Gorman

William Gorman has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11944611
    Abstract: The present disclosure relates to compounds of Formula (Ia) and (Ib): or a pharmaceutically acceptable salt thereof, which are useful in the treatment of an HIV infection in heavily treatment-experienced patients with multidrug resistant HIV infection.
    Type: Grant
    Filed: July 15, 2019
    Date of Patent: April 2, 2024
    Assignee: Gilead Sciences, Inc.
    Inventors: Laura Elizabeth Bauer, Anna Chiu, Eric M. Gorman, Andrew Stephen Mulato, Martin Sunkwang Rhee, Charles William Rowe, Scott P. Sellers, Dimitrios Stefanidis, Winston C. Tse, Stephen R. Yant, Dana J. Levine
  • Publication number: 20230203029
    Abstract: The present invention relates to compounds of Formula (I) that function as inhibitors of MerTK activity, to processes for the preparation of such compounds, to pharmaceutical compositions comprising them and to their use in the treatment of proliferative disorders, such as cancer, as well as other diseases or conditions in which (MerTK) activity is implicated: wherein R1, X1, Ring A, Ring B and Ring C are each as defined herein.
    Type: Application
    Filed: April 1, 2021
    Publication date: June 29, 2023
    Inventors: Edward Richard Walker, Timothy William Gorman, Boris Aillard, Clive McCarthy
  • Publication number: 20230082672
    Abstract: A method of forming an oral device to measure biological variables includes providing a mold configured to impart a contour of an oral retainer sized to extend about a plurality of teeth. The method includes removing the first layer of the retainer from the mold. The method includes attaching at least one sensor to the retainer, the sensor having a profile and defining a boundary edge. The method includes trimming to form a lip of the first layer of material extending beyond the boundary edge of the at least one sensor component. The method includes attaching the first layer of the retainer and at least one sensor component to the mold, forming a second layer of the retainer with the mold, wherein the first layer of retainer retains the mold contour, and wherein the at least one sensor component is disposed between the first and second layer.
    Type: Application
    Filed: July 25, 2022
    Publication date: March 16, 2023
    Inventors: Daniel Weinstein, Noah Hill, William Gorman, Saam Bozorg, J. Christopher Flaherty
  • Publication number: 20230030704
    Abstract: Provided herein is a sensor assembly including a printed circuit board including a top surface, a bottom surface and one or more sensing elements for measuring a physiologic parameter of a patient, the one or more sensing elements disposed on the top surface. The sensor assembly including an antenna coupled to the printed circuit board, the antenna coupled to the bottom surface of the printed circuit board and extending through an opening in the printed circuit board and outwardly from the top surface. The sensor assembly including a power source disposed below the printed circuit board and coupled to the printed circuit board and a case at least partially enclosing the printed circuit board, antenna, and power source, wherein the case includes a sensing opening configured to allow fluid to contact the one or more sensing element.
    Type: Application
    Filed: July 28, 2022
    Publication date: February 2, 2023
    Inventors: Daniel Weinstein, Noah William Hill, William Gorman, Saam Bozorg
  • Publication number: 20220213612
    Abstract: A method of producing an abrasion resistant anodized coating on a magnesium containing article. The method including mixing a chemical slurry including a quantity of an aqueous soluble hydroxide, a fluoride composition, at least one of silicate or vanadate, and between about 5 g/L and about 150 g/L of at least one physical property modifying agent, immersing a magnesium containing article in the chemical slurry, and applying at least one of an electrical current or electrical potential to the magnesium containing article to promote a chemical reaction on a surface of the magnesium containing article resulting in the growth of an abrasion resistant porous magnesium oxide layer on a surface of the magnesium containing article.
    Type: Application
    Filed: March 31, 2020
    Publication date: July 7, 2022
    Applicant: TECHNOLOGY APPLICATIONS GROUP, INC.
    Inventors: Gerald Voegele, William Gorman
  • Publication number: 20220075346
    Abstract: The present disclosure provides methods and systems for three-dimensional (3D) printing. In an example, a system and method for maintaining a command history in 3D printing software is disclosed. In an example, a method for updating a plurality of printing instructions comprises maintaining a plurality of printing states corresponding to the plurality of printing instructions, wherein a first state corresponds to a first set of printing instructions for printing a first portion of a 3D object. The plurality of printing states may comprise a final state comprising final printing instructions. User instructions may be received to select a second state that is not the final state. A new state may be generated comprising a second set of printing instructions for printing second portion of the 3D object. The plurality of printing instructions may be updated with the second set of printing instructions to yield an updated plurality of printing instructions.
    Type: Application
    Filed: July 19, 2021
    Publication date: March 10, 2022
    Inventors: Forrest Pieper, Mario Barrenechea, William Gorman
  • Patent number: 9825447
    Abstract: An electrical junction box includes a housing that defines an internal space. The housing has a front, which is open. A buss bar is coupled to the housing and is positioned in the internal space. A plurality of connectors is coupled to the buss bar and extends through a respective opposing side of the housing. A plurality of couplers is coupled to the buss bar. The couplers are positioned on a front face of the buss bar. The connectors are configured for insertion of wires, such that the wires are coupled to the buss bar and the buss bar is coupled to an electrical circuit. The couplers are configured for insertion of wiring that is coupled to an electrical device, such as a switch, light, fan or outlet. The wiring is coupled to the buss bar and the electrical device is coupled to the electrical circuit.
    Type: Grant
    Filed: October 21, 2016
    Date of Patent: November 21, 2017
    Inventor: William Gorman
  • Publication number: 20170294954
    Abstract: This utility patent is for the encoding of information that utilizes more than one electromagnetic polarized wave (radio wave or optical wave) from a single location and over a single frequency in which each of the electromagnetic polarized waves are independently adjusted in signal strength. The combined electromagnetic waves are then received at a single location and decoded. Combined electromagnetic waves pertains to using more than one electromagnetic wave in a mathematical formula with all electromagnetic waves being included in the formula. Single frequency, pertaining to this patent application Ser. No. 15/093,572 pertains to what is commonly referred to as the carrier frequency. The modulation from each of the antennas independently can be in the form of Amplitude Modulation, Frequency Modulation, Frequency-Shift Keying, or other modulations.
    Type: Application
    Filed: April 7, 2016
    Publication date: October 12, 2017
    Inventor: Paul William Gorman
  • Patent number: 8709565
    Abstract: A roofing membrane assembly includes a membrane having a top surface, bottom surface, first longitudinal edge and second longitudinal edge. A first primed area is located at the top surface along the first longitudinal edge. A second primed area is located on the bottom surface along the second longitudinal edge. A tape is secured to the membrane on the first primed area. A first release liner is positioned over the tape and a second release liner positioned over the second primed area.
    Type: Grant
    Filed: January 24, 2008
    Date of Patent: April 29, 2014
    Assignee: Firestone Building Products Company, LLC
    Inventors: Joseph Kalwara, Bernard Obereiner, William Gorman, Anne Hensley Poindexter
  • Patent number: 8570820
    Abstract: The present invention relates to a method and circuit for selectively repairing an embedded memory module having memory elements in an integrated circuit chip. The method includes performing a plurality of tests on the embedded memory module under operating conditions to identify a plurality of non-operational memory elements in the embedded memory module and, in response to identifying the non-operational memory elements, generating a plurality of corresponding repair solutions. The method further includes storing the plurality of corresponding repair solutions in a non-volatile storage element and determining from a mask a subset of the plurality of repair solutions that should be restored.
    Type: Grant
    Filed: March 8, 2011
    Date of Patent: October 29, 2013
    Assignee: International Business Machines Corporation
    Inventors: Kevin William Gorman, John Robert Goss, Michael Richard Ouellette, Troy Joseph Perry, Michael Anthony Ziegerhofer
  • Publication number: 20120230136
    Abstract: The present invention relates to a method and circuit for selectively repairing an embedded memory module having memory elements in an integrated circuit chip. The method comprises performing a plurality of tests on the embedded memory module under operating conditions to identify a plurality of non-operational memory elements in the embedded memory module and, in response to identifying the non-operational memory elements, generating a plurality of corresponding repair solutions. The method further comprises storing the plurality of corresponding repair solutions in a non-volatile storage element and determining from a mask a subset of the plurality of repair solutions that should be restored.
    Type: Application
    Filed: March 8, 2011
    Publication date: September 13, 2012
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Kevin William Gorman, John Robert Goss, Michael Richard Ouellette, Troy Joseph Perry, Michael Anthony Ziegerhofer
  • Patent number: 7954028
    Abstract: A design structure for implementing redundancy programming in a memory macro of an integrated circuit chip. It is assumed that all fails are row fails until determined to be bitline fails, circuits for implementing a method wherein it is assumed that all fails are row fails until determined to be bitline fails and test patterns are passed back to the failure detecting circuit when a wordline destination of the test patterns has previously been determined to be failing, and the test patterns and resultant patterns are passed between the memory macro and a test engine via logic paths connecting the memory macro to other circuits in said integrated circuit chip.
    Type: Grant
    Filed: March 12, 2008
    Date of Patent: May 31, 2011
    Assignee: International Business Machines Corporation
    Inventors: John Edward Barth, Jr., Kevin William Gorman
  • Patent number: 7735031
    Abstract: A system that includes a controller for enabling an enumeration operation. The enumeration operation is performed by a controller (110) and logic elements (120) in a system, such that each logic element in the system assigns itself a unique identifier. Each logic element can then be controlled by another source or have a means to communicate with other logic elements in the system. The unique identifier enables greater system flexibility, thereby reducing cost and improving efficiency.
    Type: Grant
    Filed: August 20, 2007
    Date of Patent: June 8, 2010
    Assignee: International Business Machines Corporation
    Inventors: Valerie Hornbeck Chickanosky, Kevin William Gorman, Emory D. Keller, Michael Richard Ouellette
  • Publication number: 20100024955
    Abstract: A roofing membrane assembly includes a membrane having a top surface, bottom surface, first longitudinal edge and second longitudinal edge. A first primed area is located at the top surface along the first longitudinal edge. A second primed area is located on the bottom surface along the second longitudinal edge. A tape is secured to the membrane on the first primed area. A first release liner is positioned over the tape and a second release liner positioned over the second primed area.
    Type: Application
    Filed: January 24, 2008
    Publication date: February 4, 2010
    Inventors: Joseph Kalwara, Bernard Obereiner, Ross Robertson, William Gorman
  • Patent number: 7549098
    Abstract: A method for implementing redundancy programming in a memory macro of an integrated circuit chip. It is assumed that all fails are row fails until determined to be bitline fails, test patterns are passed back to the failure detecting circuit when a wordline destination of the test patterns has previously been determined to be failing, and the test patterns and resultant patterns are passed between the memory macro and a test engine via logic paths connecting the memory macro to other circuits in said integrated circuit chip.
    Type: Grant
    Filed: December 19, 2006
    Date of Patent: June 16, 2009
    Assignee: International Business Machines Corporation
    Inventors: John Edward Barth, Kevin William Gorman
  • Patent number: 7518918
    Abstract: A method and apparatus for correcting embedded memory that has been identified as being defective by a memory controller. The address of the defective memory is provided by the memory controller to Built-In Test (BIST) logic in combination with a Built-In Redundancy Analyzer (BIRA) to replace the defective memory element with a redundant element.
    Type: Grant
    Filed: January 31, 2006
    Date of Patent: April 14, 2009
    Assignee: International Business Machines Corporation
    Inventor: Kevin Williams Gorman
  • Publication number: 20090052609
    Abstract: A system that includes a controller for enabling an enumeration operation. The enumeration operation is performed by a controller (110) and logic elements (120) in a system, such that each logic element in the system assigns itself a unique identifier. Each logic element can then be controlled by another source or have a means to communicate with other logic elements in the system. The unique identifier enables greater system flexibility, thereby reducing cost and improving efficiency.
    Type: Application
    Filed: August 20, 2007
    Publication date: February 26, 2009
    Inventors: Valerie Hornbeck Chickanosky, Kevin William Gorman, Emory D. Keller, Michael Richard Ouellette
  • Publication number: 20080170448
    Abstract: A design structure for implementing redundancy programming in a memory macro of an integrated circuit chip. It is assumed that all fails are row fails until determined to be bitline fails, circuit means for implementing a method wherein it is assumed that all fails are row fails until determined to be bitline fails and test patterns are passed back to the failure detecting circuit when a wordline destination of the test patterns has previously been determined to be failing, and the test patterns and resultant patterns are passed between the memory macro and a test engine via logic paths connecting the memory macro to other circuits in said integrated circuit chip.
    Type: Application
    Filed: March 12, 2008
    Publication date: July 17, 2008
    Inventors: John Edward Barth, Kevin William Gorman
  • Publication number: 20080148114
    Abstract: A method for implementing redundancy programming in a memory macro of an integrated circuit chip. It is assumed that all fails are row fails until determined to be bitline fails, test patterns are passed back to the failure detecting circuit when a wordline destination of the test patterns has previously been determined to be failing, and the test patterns and resultant patterns are passed between the memory macro and a test engine via logic paths connecting the memory macro to other circuits in said integrated circuit chip.
    Type: Application
    Filed: December 19, 2006
    Publication date: June 19, 2008
    Inventors: John Edward Barth, Kevin William Gorman
  • Publication number: 20070283964
    Abstract: A reusable device that can be attached to any filtering face mask to provide an exhalation valve and a mouthpiece to direct the exhaled air out of the mask, thereby reducing the heat and moisture inside the mask. This device may include a filter to clean the exhaled air for use in areas where directly exhaled air is disadvantageous such as operating rooms and clean manufacturing environments. This device may also include a cutting means that make it easy to attach the device to a mask by aiding in perforating the mask. This device may include various attachment means to secure the device to the mask such as threaded attachments, snap attachments, tapered attachments and adhesive attachments. This device may also include the use of soft materials for the mouthpiece to make the device conformable, comfortable and to minimize trauma in the case of a sudden unexpected impact to the mask. This device may be cleaned and sterilized for reuse. The reusability of the device reduces the cost of the filtering mask.
    Type: Application
    Filed: May 23, 2007
    Publication date: December 13, 2007
    Inventor: William Gorman