Patents by Inventor William H. Gross

William H. Gross has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11958077
    Abstract: A vibratory screening machine includes replaceable screen assemblies. Compression mechanisms are used to secure replaceable screen assemblies to the vibratory screening machine. Each compression mechanism applies a force to a replaceable screen assembly that includes both a horizontal component and a downward vertical component. Each replaceable screen assembly is typically substantially flat prior to installation on a vibratory screening machine. The force applied to a screen assembly by one or more compression mechanisms causes the screen assembly to be pushed into engagement with underlying concave support members such that the screen assembly itself assumes a concave shape with the center of the screen assembly being lower than the side edges. The vertical downward component of the force helps to secure the screen assembly to the screening machine.
    Type: Grant
    Filed: October 24, 2023
    Date of Patent: April 16, 2024
    Assignee: DERRICK CORPORATION
    Inventors: Christian Newman, Michael Peresan, Daniel P. Jenkins, Keith Wojciechowski, William H. Gross
  • Patent number: 11938516
    Abstract: A vibratory screening machine includes replaceable screen assemblies. Compression mechanisms are used to secure replaceable screen assemblies to the vibratory screening machine. Each compression mechanism applies a force to a replaceable screen assembly that includes both a horizontal component and a downward vertical component. Each replaceable screen assembly is typically substantially flat prior to installation on a vibratory screening machine. The force applied to a screen assembly by one or more compression mechanisms causes the screen assembly to be pushed into engagement with underlying concave support members such that the screen assembly itself assumes a concave shape with the center of the screen assembly being lower than the side edges. The vertical downward component of the force helps to secure the screen assembly to the screening machine.
    Type: Grant
    Filed: October 24, 2023
    Date of Patent: March 26, 2024
    Assignee: DERRICK CORPORATION
    Inventors: Christian Newman, Michael Peresan, Daniel P. Jenkins, Keith Wojciechowski, William H. Gross
  • Patent number: 11890647
    Abstract: A vibratory screening machine includes replaceable screen assemblies. Compression mechanisms are used to secure replaceable screen assemblies to the vibratory screening machine. Each compression mechanism applies a force to a replaceable screen assembly that includes both a horizontal component and a downward vertical component. Each replaceable screen assembly is typically substantially flat prior to installation on a vibratory screening machine. The force applied to a screen assembly by one or more compression mechanisms causes the screen assembly to be pushed into engagement with underlying concave support members such that the screen assembly itself assumes a concave shape with the center of the screen assembly being lower than the side edges. The vertical downward component of the force helps to secure the screen assembly to the screening machine.
    Type: Grant
    Filed: July 5, 2023
    Date of Patent: February 6, 2024
    Assignee: DERRICK CORPORATION
    Inventors: Christian Newman, Michael Peresan, Daniel P. Jenkins, Keith Wojciechowski, William H. Gross
  • Patent number: 8306892
    Abstract: An embodiment of a computer-implemented method of generating a financial index includes storing in a computer memory a regional weight for each of one or more regions, and, for each of the regions, a category weight for each of one or more categories of financial instruments issued from the region. At least one of the regional weights does not reflect a market capitalization of the respective region and may be based on, e.g., a gross domestic product for the region. The method also includes programmatically selecting one or more constituent financial instruments for the categories of financial instruments issued from the regions. In some implementations, the constituents do not include equity instruments. The method also includes programmatically calculating, for the categories and regions, subindices based at least in part on the constituent financial instruments, and determining the financial index based at least in part on the subindices, the category weights, and the regional weights.
    Type: Grant
    Filed: November 13, 2008
    Date of Patent: November 6, 2012
    Assignee: Pacific Investment Management Company LLC
    Inventors: William H. Gross, Ramin Toloui
  • Patent number: 6636111
    Abstract: An electronic circuit to cancel the input bias currents of a differential amplifier over most of the common-mode input voltage range is provided. The circuit includes an arrangement of transistors, current mirror and current sources to track the input bias currents of the differential amplifier even when the common-mode voltage is within at least 0.2 volts of the supply rail voltage level. The input bias cancellation currents are generated by tracking the input bias currents and injected into the differential amplifier inputs to cancel the input bias currents. The circuit includes a bootstrap loop to track the input bias currents when the common-mode voltage fluctuates.
    Type: Grant
    Filed: July 26, 2002
    Date of Patent: October 21, 2003
    Assignee: Linear Technology Corporation
    Inventors: William H. Gross, Danh T. Tran
  • Patent number: 6046433
    Abstract: The invention provides an integrated circuit die containing a metal heater resistor. In an embodiment of the invention, the metal heater resistor is disposed around the periphery of the die, with one end of the metal heater resistor connected to a first bond pad, and the other end of the heater resistor connected to a second bond pad. In alternative embodiments, metal-to-substrate contacts disposed along the heater resistor between the first and second ends provide improved thermal contact between the heater resistor and the die substrate. In other alternative embodiments, the metal heater resistor is disposed around the periphery of a circuit whose temperature coefficient is to be measured, such as a voltage reference circuit that is included as part of a larger integrated circuit containing other circuitry.
    Type: Grant
    Filed: September 11, 1998
    Date of Patent: April 4, 2000
    Assignee: Linear Technology Corporation
    Inventors: William H. Gross, Albert Chun Hung Lee, Gary L. Maulding
  • Patent number: 5825228
    Abstract: Low quiescent power, high output power, rail-to-rail output stage circuits and methods are provided. The output stages are capable of providing output voltages that are substantially equal to the supply voltages (i.e., within one V.sub.CE SAT of both supply voltages) without a substantial increase in output circuit complexity and without a substantial increase in quiescent current. The output stages operate by providing a direct path for the drive signal to the output sinking transistor, and an additional, separate path for the drive signal to the output sourcing transistor. The sinking and sourcing paths are separated by a PNP transistor that gradually turns off during sinking to isolate that portion of the circuit so that the drive current to the sinking transistor is not reduced. Additional embodiments are provided where additional components are utilized to further increase the maximum sink and source currents without a significant increase in quiescent current or reduction in output swing.
    Type: Grant
    Filed: January 29, 1996
    Date of Patent: October 20, 1998
    Assignee: Linear Technology Corp.
    Inventor: William H. Gross
  • Patent number: 5734293
    Abstract: Current feedback amplifier circuits, and current-to-voltage converter circuits, employing operational amplifier current mirror circuits are provided. Also provided is an output compensation circuit that, in a current feedback amplifier circuit employing the output compensation circuit together with the operational amplifier current mirrors, reduces the input bias current to be comparable to the input bias current of a voltage feedback amplifier. Additionally, a circuit and method of providing a current source that is proportional to absolute temperature is provided. A current feedback amplifier circuit employing the output compensation circuit and the operational amplifier current mirrors, and having input transistors biased by the proportional to absolute temperature current source is also provided. The drift of the input bias current over temperature are thereby made predictable and, with trimming, substantially reduced.
    Type: Grant
    Filed: November 15, 1996
    Date of Patent: March 31, 1998
    Assignee: Linear Technology Corporation
    Inventor: William H. Gross
  • Patent number: 5627486
    Abstract: Current mirror circuits and methods, and an amplifier using same, are provided in which the output of the current mirror is reduced to zero when the input current falls below a predetermined threshold. An offset current is subtracted from the input (or reference) current at input currents below the threshold. Otherwise, the offset current source is turned off. Thus, the output current can be reduced to zero, even if there is a small input current, without distorting the input-output relationship over the majority of the range of operation of the current mirror. An amplifier with two current-feedback complementary input stages (or fader circuit) is also provided which includes a gain control circuit that uses the current mirror circuits of the present invention to ensure that each input can be fully attenuated.
    Type: Grant
    Filed: June 7, 1995
    Date of Patent: May 6, 1997
    Assignee: Linear Technology Corporation
    Inventor: William H. Gross
  • Patent number: 5517143
    Abstract: Current mirror circuits and methods, and an amplifier using same, are provided in which the output of the current mirror is reduced to zero when the input current falls below a predetermined threshold. An offset current is subtracted from the input (or reference) current at input currents below the threshold. Otherwise, the offset current source is turned off. Thus, the output current can be reduced to zero, even if there is a small input current, without distorting the input-output relationship over the majority of the range of operation of the current mirror. An amplifier with two current-feedback complementary input stages (or fader circuit) is also provided which includes a gain control circuit that uses the current mirror circuits of the present invention to ensure that each input can be fully attenuated.
    Type: Grant
    Filed: November 29, 1994
    Date of Patent: May 14, 1996
    Assignee: Linear Technology Corporation
    Inventor: William H. Gross
  • Patent number: 5327095
    Abstract: A method and circuit for increasing the output impedance of an inactive amplifier is provided. The method and circuit allows an increased number of amplifiers to be coupled in parallel to a single transmission line for distributing a plurality of video or other electrical signals to a remote location. The method and circuit increasing the impedance of an amplifier feedback network during inactive operation using a bootstrapping technique (i.e., by driving the feedback network) so as to increase the overall impedance of the amplifier during such operation.
    Type: Grant
    Filed: February 19, 1993
    Date of Patent: July 5, 1994
    Assignee: Linear Technology Corporation
    Inventors: William H. Gross, John W. Wright
  • Patent number: 5316964
    Abstract: An integrated circuit having diffused resistors formed in a low impurity concentration isolation region.
    Type: Grant
    Filed: December 8, 1992
    Date of Patent: May 31, 1994
    Assignee: Linear Technology Corporation
    Inventor: William H. Gross
  • Patent number: 4963802
    Abstract: A logic-controlled circuit superimposes a constant voltage across an actuator or motor load that is driven by a bridge-type amplifier to control the constant velocity operation of such load in response to an applied logic signal that may also disable the bridge-type amplifier.
    Type: Grant
    Filed: March 27, 1989
    Date of Patent: October 16, 1990
    Assignee: ELANTEC
    Inventors: William H. Gross, James B. Cecil
  • Patent number: 4935704
    Abstract: An improved direct-coupled transistor amplifier circuit includes a pair of complementary conductivity type output transistors that are quiescently biased to slightly conductive state to provide low distortion amplification and temperature stabilized operating conditions. A pair of complementary conductivity type input transistors receive bias current having a value that is substantially matched to the change with temperature of base-emitter voltage of an input transistor divided by the value of a resistor connecting the emitter of the input transistor to receive the bias current.
    Type: Grant
    Filed: March 27, 1989
    Date of Patent: June 19, 1990
    Assignee: Elantec
    Inventor: William H. Gross
  • Patent number: 4910477
    Abstract: A bridge-type linear amplifier includes separate local feedback networks on each half-side channel of the amplifier and an additional feedback network between channels of the amplifier in order to correct for differences in current gains of output transistors and requisite drive currents.
    Type: Grant
    Filed: March 27, 1989
    Date of Patent: March 20, 1990
    Assignee: Elantec
    Inventor: William H. Gross
  • Patent number: 4878034
    Abstract: An overload protection circuit for a disableable amplifier includes a sensing resistor connected to provide indication of the current supplied to the amplifier and includes logic circuitry for producing a disabling control signal for a selected time interval following detection of the overload condition of the amplifier.
    Type: Grant
    Filed: March 27, 1989
    Date of Patent: October 31, 1989
    Assignee: Elantec
    Inventors: William H. Gross, James B. Cecil
  • Patent number: 4827223
    Abstract: An improved direct-coupled amplifier includes a push-pull pair of transistors in an output stage that provides high output current on low quiescent current. Each such output transistor is driven by a push-pull pair of driver transistors that receives the applied signal at proper bias levels provided by forward-biased diodes (or diodes and gain element) to provide high input impedance to low output impedance signal buffering with wide bandwidth at high power levels.
    Type: Grant
    Filed: March 21, 1988
    Date of Patent: May 2, 1989
    Assignee: Elantec
    Inventor: William H. Gross
  • Patent number: 4705969
    Abstract: A tachometer circuit is described that has a zero ripple d-c output that is directly proportional to the frequency. The circuit includes a pair of full wave rectifiers to act upon the sine and cosine signal inputs. The rectified currents are first squared, then summed together and finally the square root is taken. Since the quantity .sqroot.sine.sup.2 +cosine.sup.2 is a constant, there is no ripple and no output filtering is required to eliminate ripple. This means that the output can follow very rapid changes in frequency and no lag is introduced by the inclusion of low pass signal filtering.
    Type: Grant
    Filed: September 19, 1986
    Date of Patent: November 10, 1987
    Assignee: National Semiconductor Corporation
    Inventor: William H. Gross
  • Patent number: 4617654
    Abstract: A matrix circuit is disclosed having four inputs for coupling to either the four elements in a four-quadrant photodetector in a one-beam optical disc system or to the six elements in a hex photodetector in a three-beam optical disc system. A fifth input is provided with a logic input determined by which system is being implemented. Three outputs are provided, one each for signal, tracking error and focus error. The circuit will accommodate both systems to produce the required outputs with a minimum of redundant parts.
    Type: Grant
    Filed: June 12, 1984
    Date of Patent: October 14, 1986
    Assignee: National Semiconductor Corporation
    Inventors: William H. Gross, Toyojiro Naokawa
  • Patent number: 4613769
    Abstract: A peak-to-peak signal detector circuit is disclosed. It can be directly coupled and rejects any d-c component associated with the signal without requiring a coupling capacitor. The input is applied to separate positive and negative peak detectors the outputs of which are subtractively combined in an op-amp. A circuit application as a drop out detector in an optical disc system is detailed.
    Type: Grant
    Filed: August 13, 1984
    Date of Patent: September 23, 1986
    Assignee: National Semiconductor Corporation
    Inventors: William H. Gross, Toyojiro Naokawa