Abstract: A hardware counter counts high rate, lower significant bits. A carry-borrow circuit responsive to the higher order bit position of the hardware counter includes cancel means responsive to successively received carry and borrow signals to cancel previously generated carries or borrows. Memory means in the carry-borrow circuit memorize the generation of the carry or borrow by the hardware counter. A programmed microprocessor, or the like, periodically senses the status of the carry-borrow circuit for transferring signal contents thereof to a software controlled count field. The arrangement permits high speed counting without interrupting the microprocessor and not imposing rate constraints on program execution of the microprocessor.