Patents by Inventor William J. Chalmers

William J. Chalmers has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Bios having macro/effector pairs for hardware initialization
    Patent number: 6785806
    Abstract: A BIOS having a set of effectors to initialize harware within the system. The BIOS having a set of macros, each macro of the set of macros having a reference to an effector of the set of effectors, each macro of the set of macros having a set of arguments.
    Type: Grant
    Filed: February 29, 2000
    Date of Patent: August 31, 2004
    Assignee: Intel Corporation
    Inventors: Joseph A. Schaefer, Michael F. Kartoz, Robert L. Huff, Kimberly A. Davis, Kirk Brannock, Donald Hewett, Daniel A. Rich, William J. Chalmers
  • Method and apparatus for implementing a register scan process
    Patent number: 6732261
    Abstract: In one embodiment, the invention is a method. The method includes receiving expected values of a configuration. The method also includes comparing the expected values with values of a configuration database. Furthermore, the method includes reporting results of the comparing.
    Type: Grant
    Filed: December 30, 1999
    Date of Patent: May 4, 2004
    Assignee: Intel Corporation
    Inventors: William J. Chalmers, Joseph A. Schaefer, Kimberly A. Davis, Don G. Craven, Daniel A. Rich
  • Method and apparatus for use of a non-volatile storage management system for PC/AT compatible system firmware
    Patent number: 6629192
    Abstract: In one embodiment, the invention is an apparatus. The apparatus includes a BIOS embodied in a non-volatile storage device. The apparatus also includes a non-volatile storage manager embodied in the non-volatile storage device, the non-volatile storage manager controlling access to a portion of the BIOS.
    Type: Grant
    Filed: December 30, 1999
    Date of Patent: September 30, 2003
    Assignee: Intel Corporation
    Inventors: Joseph A. Schaefer, Dave Edwards, Kirk Brannock, William J. Chalmers
  • METHOD AND APPARATUS FOR IMPLEMENTING A REGISTER SCAN PROCESS
    Publication number: 20030182545
    Abstract: In one embodiment, the invention is a method. The method includes receiving expected values of a configuration. The method also includes comparing the expected values with values of a configuration database. Furthermore, the method includes reporting results of the comparing.
    Type: Application
    Filed: December 30, 1999
    Publication date: September 25, 2003
    Inventors: WILLIAM J. CHALMERS, JOSEPH A. SCHAEFER, KIMBERLY A. DAVIS, DON G. CRAVEN, DANIEL A. RICH
  • Method and apparatus for implementing and maintaining a configuration database
    Patent number: 6594663
    Abstract: In one embodiment, the invention is an apparatus. The apparatus includes a first d-node having a pointer to a subordinate d-node and an identifier. The apparatus also includes a set of d-nodes, each d-node of the set of d-nodes having an identifier, a pointer to a peer d-node, a pointer to a subordinate d-node and a pointer to an entry. The set of d-nodes is accessible through the pointer of the first d-node. The apparatus also includes a set of entries, each entry of the set of entries having an identifier, a type, a value, and a pointer to an entry. The value of each entry embodies data corresponding to a configuration of a system.
    Type: Grant
    Filed: December 30, 1999
    Date of Patent: July 15, 2003
    Assignee: Intel Corporation
    Inventors: Joseph A. Schaefer, Michael F. Kartoz, Robert L. Huff, Kimberly A. Davis, Kirk Brannock, Donald Hewett, William J. Chalmers
  • System and method for enabling advanced graphics port and use of write combining cache type by reserving and mapping system memory in BIOS
    Patent number: 6581148
    Abstract: The present invention relates to using memory in a computer. In particular, the present invention relates to allocating a portion of computer-system memory as a cache, making the allocated portion accessible to device drivers and hiding the allocated memory portion from the operating system. In one embodiment of the present invention, an amount of system memory is allocated for use as a direct memory access (“DMA”) buffer. The allocated memory is mapped as write combining, and this write combining memory is made available to a device driver.
    Type: Grant
    Filed: November 24, 1999
    Date of Patent: June 17, 2003
    Assignee: Intel Corporation
    Inventors: Shivaprasad Sadashivaiah, William J. Chalmers
  • METHOD AND APPARATUS FOR IMPLEMENTING AND MAINTAINING A CONFIGURATION DATABASE
    Publication number: 20030088535
    Abstract: In one embodiment, the invention is an apparatus. The apparatus includes a first d-node having a pointer to a subordinate d-node and an identifier. The apparatus also includes a set of d-nodes, each d-node of the set of d-nodes having an identifier, a pointer to a peer d-node, a pointer to a subordinate d-node and a pointer to an entry. The set of d-nodes is accessible through the pointer of the first d-node. The apparatus also includes a set of entries, each entry of the set of entries having an identifier, a type, a value, and a pointer to an entry. The value of each entry embodies data corresponding to a configuration of a system.
    Type: Application
    Filed: December 30, 1999
    Publication date: May 8, 2003
    Inventors: JOSEPH A. SCHAEFER, MICHAEL F. KARTOZ, ROBERT L. HUFF, KIMBERLY A. DAVIS, KIRK BRANNOCK, DONALD HEWETT, WILLIAM J. CHALMERS