Patents by Inventor William J. Hery

William J. Hery has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method of spare capacity use for fault detection in a multiprocessor system
    Patent number: 4807228
    Abstract: A method of detecting and identifying faulty processors in a multiprocessor system. A processing task is assigned when possible to two processors, a primary processor and a secondary processor if a second idle processor is available. In one embodiment, the operations of a secondary processor are preempted and that processor is reassigned as primary for another task if no idle processor is available when the task is initiated. In a second embodiment, the operations of a secondary processor are not preempted, and a new task is queued until an idle processor becomes available. If a secondary processor completes a task, its results are compared with the results of the primary processor. Disagreement messages are broadcast to a central controller in a nondistributed embodiment and to all the processors in the system in a distributed embodiment. The disagreement messages are periodically analyzed by the controller or by each processor.
    Type: Grant
    Filed: March 18, 1987
    Date of Patent: February 21, 1989
    Assignee: American Telephone and Telegraph Company, AT&T Bell Laboratories
    Inventors: Anton T. Dahbura, William J. Hery, Krishan K. Sabnani