Patents by Inventor William J. Minford

William J. Minford has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7844149
    Abstract: The invention relates to an electro-optic modulator structure containing an additional set of bias electrodes buried within the device for applying bias to set the operating point. Thus the RF electrodes used to modulate incoming optical signals can be operated with zero DC bias, reducing electrode corrosion by galvanic and other effects that can be present in non-hermetic packages. The bias electrodes are at least partially separated from the substrate with a buffer layer, which in one embodiment has a small amount of conductivity. This conductive buffer layer reduces optical loss from the bias electrodes and also reduces DC drift.
    Type: Grant
    Filed: January 9, 2008
    Date of Patent: November 30, 2010
    Assignee: JDS Uniphase Corporation
    Inventors: Karl Kissa, William J. Minford, Glen Drake
  • Patent number: 7529433
    Abstract: The invention relates to an electro-optic modulator structure containing an additional set of bias electrodes buried within the device for applying bias to set the operating point. Thus the RF electrodes used to modulate incoming optical signals can be operated with zero DC bias, reducing electrode corrosion by electro-migration and other effects that can be present in non-hermetic packages. The bias electrodes include an upper split portion and an optically transparent lower portion. The optically transparent lower layer improves modulation frequency and reduces optical loss.
    Type: Grant
    Filed: January 9, 2008
    Date of Patent: May 5, 2009
    Assignee: JDS Uniphase Corporation
    Inventors: Karl Kissa, William J. Minford, Jason Jiazhan Xu, Glen Drake
  • Patent number: 7512303
    Abstract: The invention relates to a wafer scale process for the manufacture of optical waveguide devices, and particularly for the manufacture of ridge waveguide devices, and the improved waveguides made thereby. The present invention has found a process for achieving sub-micron control of an optical waveguiding layer thickness by providing a dimensionally stable wafer assembly into which adhesive can be introduced without altering the planar relationship between a carrier wafer and an optically transmissive wafer in wafer scale manufacture. This process permits wafer scale manufacture of optical waveguide devices including thin optically transmissive layers. A pattern of spacer pedestals is created by a deposition and etch back, or by a surface etch process to precisely reference surface information from a master surface to a carrier wafer to a thin optically transmissive wafer. The tolerance achievable in accordance with this process provides consistent yield across the wafer.
    Type: Grant
    Filed: June 27, 2007
    Date of Patent: March 31, 2009
    Assignee: JDS Uniphase Corporation
    Inventors: Benjamin F. Catching, Donald M. Friedrich, Charles A. Hulse, Marc K. Von Gunten, Jason Reed, Karl Kissa, Glen Drake, Julia Duncan, William J. Minford, Hiren V. Shah, Jerry Zieba, Jason Jiazhan Xu
  • Patent number: 7408693
    Abstract: The invention relates to an electro-optic modulator structure containing an additional set of bias electrodes buried within the device for applying bias to set the operating point. Thus the RF electrodes used to modulate incoming optical signals can be operated with zero DC bias, reducing electrode corrosion by electro-migration, galvanic, and other effects that can be present in non-hermetic packages. The RF electrodes are supported by a first surface of the electro-optic substrate, while the bias electrodes are supported by a second opposite surface.
    Type: Grant
    Filed: October 31, 2007
    Date of Patent: August 5, 2008
    Assignee: JDS Uniphase Corporation
    Inventors: Karl Kissa, Gregory J. McBrien, Glen Drake, William J. Minford
  • Publication number: 20080170821
    Abstract: The invention relates to an electro-optic modulator structure containing an additional set of bias electrodes buried within the device for applying bias to set the operating point. Thus the RF electrodes used to modulate incoming optical signals can be operated with zero DC bias, reducing electrode corrosion by galvanic and other effects that can be present in non-hermetic packages. The bias electrodes are at least partially separated from the substrate with a buffer layer, which in one embodiment has a small amount of conductivity. This conductive buffer layer reduces optical loss from the bias electrodes and also reduces DC drift.
    Type: Application
    Filed: January 9, 2008
    Publication date: July 17, 2008
    Applicant: JDS Uniphase Corporation, State of Incorporation: Delaware
    Inventors: Karl Kissa, William J. Minford, Glen Drake
  • Publication number: 20080170818
    Abstract: The invention relates to an electro-optic modulator structure containing an additional set of bias electrodes buried within the device for applying bias to set the operating point. Thus the RF electrodes used to modulate incoming optical signals can be operated with zero DC bias, reducing electrode corrosion by electro-migration and other effects that can be present in non-hermetic packages. The bias electrodes include an upper split portion and an optically transparent lower portion. The optically transparent lower layer improves modulation frequency and reduces optical loss.
    Type: Application
    Filed: January 9, 2008
    Publication date: July 17, 2008
    Applicant: JDS Uniphase Corporation, State of Incorporation: Delaware
    Inventors: Karl Kissa, William J. Minford, Jason Jiazhan Xu, Glen Drake
  • Publication number: 20030100195
    Abstract: The present invention provides a semiconductor device, a method of manufacture therefor, and an integrated circuit including the semiconductor device. The semiconductor device includes a semiconductor substrate and an indium doped dielectric layer located over the semiconductor substrate.
    Type: Application
    Filed: November 28, 2001
    Publication date: May 29, 2003
    Applicant: Agere Systems Inc.
    Inventors: Julia C. Duncan, William J. Minford, John W. Osenbach
  • Patent number: 4781743
    Abstract: A method of improving device performance of optical devices formed in optical substrates is disclosed. The method requires that the optical substrate material, for example, lithium niobate, be pre-annealed to form a surface layer with a known congruent composition before diffusing the waveguide material into the substrate. It has been determined that the composition of optical substrates can vary from boule-to-boule, or even along the length of a given boule. These variations affect the diffusion rate of the waveguide material and result in varying mode sizes (both width and depth of the mode). By pre-annealing all material, the diffusion rate will remain relatively constant, regardless of the particular boule. The pre-annealing can be accomplished either by pre-equilibrating the lithium niobate in a vapor-phase equilibrating crucible containing pre-reacted lithium niobate cullet with the desired composition, or pre-equilibrating the lithium niobate to the Li.sub.2 O-rich phase boundary in a two-phase (LiNbO.
    Type: Grant
    Filed: January 16, 1987
    Date of Patent: November 1, 1988
    Assignee: American Telephone and Telegraph Company AT&T Bell Laboratories
    Inventors: Ronald J. Holmes, William J. Minford
  • Patent number: 4554050
    Abstract: The specification describes a technique for etching titanium using EDTA compounds. It is especially useful for selective etch processes such as those used to form titanium diffused waveguides in lithium niobate crystals.
    Type: Grant
    Filed: July 16, 1984
    Date of Patent: November 19, 1985
    Assignee: AT&T Bell Laboratories
    Inventors: William J. Minford, Edmond J. Murphy, Trudie C. Rice