Patents by Inventor William J. Petrowsky

William J. Petrowsky has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8539274
    Abstract: A method, apparatus, and computer program product for load shedding during an emergency power off event. In one embodiment, power is supplied from a main power source to a plurality of electrical loads within a device enclosure. Power loss is detected from the main power source. Upon detecting the power loss, at least one of the electrical loads is disconnected from a supplemental power source such that power to at least one remaining load connected to the supplemental power source is sustained by the supplementary power source.
    Type: Grant
    Filed: March 17, 2010
    Date of Patent: September 17, 2013
    Assignee: International Business Machines Corporation
    Inventors: Robert G. Atkins, Edward N. Cohen, Philip M. Corcoran, William J. Petrowsky, Edward J. Seminaro
  • Publication number: 20110231689
    Abstract: A method, apparatus, and computer program product for load shedding during an emergency power off event. In one embodiment, power is supplied from a main power source to a plurality of electrical loads within a device enclosure. Power loss is detected from the main power source. Upon detecting the power loss, at least one of the electrical loads is disconnected from a supplemental power source such that power to at least one remaining load connected to the supplemental power source is sustained by the supplementary power source.
    Type: Application
    Filed: March 17, 2010
    Publication date: September 22, 2011
    Applicant: International Business Machines Corporation
    Inventors: Robert G. Atkins, Edward N. Cohen, Philip M. Corcoran, William J. Petrowsky, Edward J. Seminaro
  • Patent number: 7560913
    Abstract: An input-tracking and automatic output-margining system and method including: a logic board having a first load, a second load, and a first regulator disposed thereon; and a power supply having a bulk power source, a precision reference voltage, and a second regulator disposed therein; the first load supplied by a first voltage generated by the power supply, and the second load supplied by a second voltage generated by the first regulator; wherein a reference input to the first regulator comprises a first feedback voltage derived from the first voltage, such that a change in the value of the first voltage is tracked by the second voltage.
    Type: Grant
    Filed: September 22, 2006
    Date of Patent: July 14, 2009
    Assignee: International Business Machines Corporation
    Inventors: William J. Petrowsky, Brian C. Tucker
  • Publication number: 20090006902
    Abstract: Monitoring a plurality of field-replaceable units (FRUs) in an enclosure using two or more microcontroller-equipped power supplies to detect an FRU failure. Upon detection of an FRU failure, a first signal indicative of the failure is communicated from at least one of the microcontroller-equipped power supplies to one or more small computer system interface (SCSI) repeaters over an I2C bus. The one or more SCSI repeaters report a second signal indicative of the failure to one or more central electronics complexes (CECs) over one or more SCSI busses. The first signal may, but need not, be substantially identical to the second signal.
    Type: Application
    Filed: June 29, 2007
    Publication date: January 1, 2009
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Philip M. Corcoran, William P. Kostenko, William J. Petrowsky, Edward J. Seminaro
  • Publication number: 20080074091
    Abstract: An input-tracking and automatic output-margining system and method including: a logic board having a first load, a second load, and a first regulator disposed thereon; and a power supply having a bulk power source, a precision reference voltage, and a second regulator disposed therein; the first load supplied by a first voltage generated by the power supply, and the second load supplied by a second voltage generated by the first regulator; wherein a reference input to the first regulator comprises a first feedback voltage derived from the first voltage, such that a change in the value of the first voltage is tracked by the second voltage.
    Type: Application
    Filed: September 22, 2006
    Publication date: March 27, 2008
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: William J. Petrowsky, Brian C. Tucker
  • Patent number: 5539606
    Abstract: An electronic circuit breaker includes multiloop control loops based upon a current sensing loop and a voltage sensing loop. The current sensing loop also operates to drive a timer which ultimately controls whether current flows through the load or not. Additionally, the current loop is made to be dominant over the voltage loop. However, during normal operation the voltage loop and current loop act cooperatively to effectively control the impedance as seen by the load.
    Type: Grant
    Filed: February 25, 1994
    Date of Patent: July 23, 1996
    Assignee: International Business Machines Corporation
    Inventors: Kevin R. Covi, William J. Petrowsky, Steven G. Shevach
  • Patent number: 5119059
    Abstract: A dual mold choke is provided to reduce both differential and common mode electromagnetic interference. Ferrite cores are placed around DC power bus bars providing an inductor limiting differential mode noise and creating a choke reducing common mode noise. The use of E-cores provides a simplified mechanical assembly while providing high levels of noise reduction. An air gap between the center legs of the cores prevents saturation of the choke.
    Type: Grant
    Filed: September 4, 1990
    Date of Patent: June 2, 1992
    Assignee: International Business Machines Corporation
    Inventors: Kevin R. Covi, William J. Petrowsky, James H. Spreen