Abstract: Multi-layer ensembles of neural subnetworks are disclosed. Implementations can classify inputs indicating various anomalous sensed conditions into probabilistic anomalies using an anomaly subnetwork. Determined probabilistic anomalies are classified into remedial application triggers invoked to recommend or take actions to remediate, and/or report the anomaly. Implementations can select a report type to submit, or a report recipient, based upon the situation state, e.g.

Abstract: Energy is transmitted to a body lumen or passageway in the form of pulsed electric fields (PEFs) and in a manner which provides focal therapy. In some embodiments, PEFs are delivered through independent electrically active electrodes of an energy delivery body, typically in a monopolar fashion. Such delivery concentrates the electrical energy over a smaller surface area, resulting in stronger effects than delivery through an electrode extending circumferentially around the lumen or passageway. It also forces the electrical energy to be delivered in a staged regional approach, mitigating the effect of preferential current pathways through the surrounding tissue. Focal delivery of PEFs can provide increased tissue lethality by employing precise timing and sequencing of energy delivery to the electrodes.

Abstract: In one aspect a semiconductor device as set forth herein can include a spacer having a first section of a first material and a second section of a second material, the second section disposed above a certain elevation and the first section disposed below the certain elevation. In one aspect a semiconductor device as set forth herein can include a conductive gate structure having a first length at elevations below a certain elevation and a second length at elevations above the certain elevation, the second length being less than the first length. A semiconductor device having one or more of a plural material spacer or a reduced length upper elevation conductive gate structure can feature a reduced likelihood of electrical shorting.

Abstract: A method of contact formation and resulting structure is disclosed. The method includes providing a starting semiconductor structure, the structure including a semiconductor substrate with fins coupled to the substrate, a bottom portion of the fins being surrounded by a first dielectric layer, dummy gates covering a portion of each of the fins, spacers and a cap for each dummy gate, and a lined trench between the gates extending to and exposing the first dielectric layer. The method further includes creating an epitaxy barrier of hard mask material between adjacent fins in the trench, creating N and P type epitaxial material on the fins adjacent opposite sides of the barrier, and creating sacrificial semiconductor epitaxy over the N and P type epitaxial material, such that subsequent removal thereof can be done selective to the N and P type of epitaxial material.

Abstract: In one aspect a semiconductor device as set forth herein can include a spacer having a first section of a first material and a second section of a second material, the second section disposed above a certain elevation and the first section disposed below the certain elevation. In one aspect a semiconductor device as set forth herein can include a conductive gate structure having a first length at elevations below a certain elevation and a second length at elevations above the certain elevation, the second length being less than the first length. A semiconductor device having one or more of a plural material spacer or a reduced length upper elevation conductive gate structure can feature a reduced likelihood of electrical shorting.

Abstract: Disclosed herein are various methods of forming metal-containing insulating material regions on a metal layer of a gate structure of a semiconductor device. In one example, the method includes forming a gate structure of a transistor, the gate structure comprising at least a first metal layer, and forming a first metal-containing insulating material region in the first metal layer by performing a gas cluster ion beam process using to implant gas molecules into the first metal layer.

Abstract: Disclosed herein are various methods of forming metal-containing insulating material regions on a metal layer of a gate structure of a semiconductor device. In one example, the method includes forming a gate structure of a transistor, the gate structure comprising at least a first metal layer, and forming a first metal-containing insulating material region in the first metal layer by performing a gas cluster ion beam process using to implant gas molecules into the first metal layer.

Abstract: A cart system for distributing pharmaceutical items includes a cart and a plurality of totes. The cart has a wheeled base, framework, a door, and a locking mechanism. The framework extends upwardly from the base and forms an interior storage region having a front, a rear, and opposing sides. An access opening at the front is provided, with the door movable to a closed position that partially blocks the access opening. The locking mechanism selectively locks the door in the closed position. In a shipping state, the totes are loaded within the storage region and the door locked. The totes are visible from an exterior of the cart, but cannot be removed without evidence of tampering. The framework can divide the storage region into two or more columns, and includes platforms within the columns and arranged to define compartments sized to receive respective ones of the totes.