Patents by Inventor William M. Beckenbaugh
William M. Beckenbaugh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 5848466Abstract: A microelectronic assembly (10) is formed by bonding an integrated circuit component (20) to a substrate (12). The substrate (12) includes a via (22) and a metal contact (24) closing the via (22). A bonding agent (14), such as a solder paste or a conductive epoxy, is dispensed into the via (22) adjacent the metal contact (24). A carrier tape (16) that includes partially-cured films (18) is placed onto the substrate (12) such that the film (18) covers the via (22) and forms a gap (28) between the substrate (12) and the film (18). The integrated circuit component (20) is superposed onto the substrate (12) such that conductive bumps (26) on the integrated circuit component (20) perforate and extend through the film (18) and contact the bonding agent (14) in the via (22). Portions (44) displaced during perforation are received in the gap (28). The film (18) is thus interposed between the substrate (12) and the integrated circuit component (20).Type: GrantFiled: November 19, 1996Date of Patent: December 15, 1998Assignee: Motorola, Inc.Inventors: Daniel Joseph Viza, Dennis Brian Miller, William M. Beckenbaugh, Conrad S. Monroe, Kent W. Hansen
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Patent number: 5593903Abstract: A method of forming contact pads (140) that allows for wafer level testing and burn-in of semiconductor die (22). A plurality of semiconductor die (22) are formed upon a semiconductor wafer (20), each semiconductor die (22) having a plurality of bonding pads (78). A contact pad (140) is formed overlying each bonding pad (78) and is electrically coupled to the bonding pad (78) and to wafer test pads (38) through vertical and/or horizontal wafer conductors (42-47 and 52-53 respectively) so that each semiconductor die (22) is uniquely identified. Contact pads (140) protect underlying bonding pads (78) during the formation and removal of vertical and/or horizontal wafer conductors (42-47 and 52-53 respectively). Thus, wafer level electrical testing and/or burn-in can be performed prior to designating a final packaging method for the semiconductor die (22).Type: GrantFiled: March 4, 1996Date of Patent: January 14, 1997Assignee: Motorola, Inc.Inventors: William M. Beckenbaugh, William H. Lytle, Bernard Berman
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Patent number: 5377027Abstract: A liquid crystal display device, (10 in FIG. 1) comprises a liquid crystal panel (12) and a backside illuminator (14). The liquid crystal includes pixels (36) separated by a matrix area (37). The backside illuminator comprises a waveguide (40) having a face (44) facing the backside (18) of the liquid crystal panel and including light-emitting sites (48) disposed in registration with the pixels and separated by non-emitting surface (46). During operation, light received from a suitable source (52, 54, 56) is transmitted within the waveguide to the sites and emitted to illuminate the corresponding pixels.Type: GrantFiled: October 2, 1992Date of Patent: December 27, 1994Assignee: Motorola, Inc.Inventors: Kevin W. Jelley, George T. Valliath, William M. Beckenbaugh
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Patent number: 5229070Abstract: A low temperature-wetting solder paste for forming a tin-base solder connection comprises a mixture of compositionally distinct first and second solder powders. The first solder is formed predominantly of tin, preferably at least 90 weight percent. The second powder is formed of a tin alloy containing indium or bismuth and having a melting temperature less than the first powder. During soldering, the second powder melts during the early stages of the heating cycle to initiate wetting of the faying surfaces and promote dissolution of the first powder, thereby reducing the time and temperature required to form the solder connection.Type: GrantFiled: July 2, 1992Date of Patent: July 20, 1993Assignee: Motorola, Inc.Inventors: Cynthia M. Melton, Andrew Skipor, William M. Beckenbaugh
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Patent number: 5194137Abstract: A method for forming a solder-bumped terminal on a planar dielectric substrate utilizes a terminal of a particular configuration and comprises depositing onto the terminal a thin plate of solder alloy and reflowing the solder alloy to form a bump. The terminal configuration includes an enlarged terminal pad connected to a relatively narrow linear runner section. Preferably, the runner section width is between about 50 and 150 microns, whereas the pad width is between about 1.2 and 2.0 times the runner section width. The terminal is initially fabricated to include a metal layer adjacent the substrate formed, for example, of copper and a thin, outer plate composed of the solder alloy. The solder plate is deposited in a uniform thickness to both the terminal pad and the adjacent runner section. The terminal is then heated to melt the solder plate, whereupon the molten solder is drawn from the runner onto the enlarged pad to form a bump.Type: GrantFiled: August 5, 1991Date of Patent: March 16, 1993Assignee: Motorola Inc.Inventors: Kevin D. Moore, John W. Stafford, William M. Beckenbaugh, Ken Cholewczynski
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Patent number: 5160409Abstract: A method for forming a solder-bumped circuit trace on a planar dielectric substrate includes fabricating a trace having an intersection between linear section, depositing onto the trace a uniform thin plate of solder alloy and reflowing the solder alloy to form a bump at the intersection. More particularly, the trace comprises first and second linear sections that intersect at an angle between 45 degrees and 135 degrees and have widths preferably between 50 and 150 microns. The solder plate is deposited, preferably by electroplating, at a thickness between about 10 and 25 microns. Thereafter, when the trace is heated to melt the solder layer, the solder coalesces at the intersection to form the bump.Type: GrantFiled: August 5, 1991Date of Patent: November 3, 1992Assignee: Motorola, Inc.Inventors: Kevin D. Moore, John W. Stafford, William M. Beckenbaugh, Ken Cholewczynski
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Patent number: 4304849Abstract: In an improved method for depositing a metal on a substrate of the type in which a dielectric coated substrate is coated with a sensitizing solution containing a reductible metal salt, a primary reducing agent comprising 2,7 anthraquinone disulfonic acid and a secondary reducing agent, the substrate is exposed to ultraviolet light in an atmosphere having a temperature of at least 117.degree. F. (42.degree. C.) and a mass of water vapor of at least 3.8 mg of water per liter of dry air for at least 15 seconds. In an embodiment of the method the substrate is aerated in a moisture controlled atmosphere at room temperature for at least 30 minutes prior to exposing the substrate to ultraviolet light.Type: GrantFiled: May 16, 1980Date of Patent: December 8, 1981Assignee: Western Electric Co., Inc.Inventors: William M. Beckenbaugh, Theodore D. Polakowski, Jr., Donald Dinella, Patricia J. Goldman
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Patent number: 4268536Abstract: The method of depositing a metal on a surface especially suitable for the manufacture of printed circuit boards includes coating the surface with a sensitizing solution comprising an inaqueous solvent solution, a reducible salt of a non-noble metal, a salt of 2,7 anthraquinone disulfonic acid and a polyol type secondary reducing agent such as sorbitol. The coated surface is then dried and the dried surface may be stored for extended periods of time before further processing which consists of imaging the sensitized surface with ultraviolet light and electrolessly plating a metal over the imaged surface.Type: GrantFiled: January 2, 1980Date of Patent: May 19, 1981Assignee: Western Electric Company, Inc.Inventors: William M. Beckenbaugh, Patricia J. Goldman, Ted D. Polakowski, Jr.
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Patent number: 4261800Abstract: A method of selectively depositing a metal on a surface of a substrate is disclosed. A suitable substrate is selected and a surface is treated with a reducing agent selected from the group consisting of (a) hydrazine, (b) a substituted hydrazine having the structural formula ##STR1## where R.sub.1 is an organic radical selected from the group consisting of alkyl, cycloalkyl, aryl, alkaryl, aralkyl, alkoxy, aryloxy and heterocyclic radicals and R.sub.2, R.sub.3 and R.sub.4 are the hydrogen radical or are the same as R.sub.1, and (c) a mixture of the foregoing. The reducing agent treated surface is selectively exposed to a source of ultraviolet radiation to render a selected area thereof incapable of reducing an activating metal species and to delineate an unexposed area so capable. The selectively radiation-exposed surface is treated with an activating metal species to activate the delineated, unexposed area.Type: GrantFiled: August 15, 1977Date of Patent: April 14, 1981Assignee: Western Electric Co., Inc.Inventors: William M. Beckenbaugh, Michael A. De Angelo
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Patent number: 4228213Abstract: A method of depositing a stress-free electroless copper deposit is disclosed. The method comprises contacting a catalyzed surface with a solution comprising a source of cupric ions; a reducing agent for the cupric ions; a complexing agent for the solution selected from (a) ethylenediaminetetraacetic acid, (b) a salt of (a), (c) a modified ethylenediamine acetic acid, (d) a salt of (c), and (e) a mixture of at least two of the foregoing complexing agents; a stabilizer for the solution comprising a mercury compound; and an accelerator for the solution comprising a water-soluble compound containing a cyanide radical (CN.sup.-) complexed with a metal selected from Group VIII of the Periodic Table of the Elements.Type: GrantFiled: August 13, 1979Date of Patent: October 14, 1980Assignee: Western Electric Company, Inc.Inventors: William M. Beckenbaugh, Kim L. Morton
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Patent number: 4181750Abstract: A method of depositing a metal on a surface is disclosed. The method comprises coating the surface with a sensitizing solution comprising at least a reducible salt of a non-noble metal. The coated surface is selectively treated to reduce the metal salt to metallic nuclei to form a catalytic pattern thereon capable of directly catalyzing the deposition of a metal on the nuclei from an electroless metal deposition solution. The selectively treated surface is then exposed to a stripping solution comprising an organic acid selected from (a) a carboxylic acid having a structural formula of ##STR1## where R is a member selected from the hydrogen radical, H, and an alkyl group having 1 to 3 carbon atoms, (b) citric acid and (c) a mixture of any of the foregoing acids, to essentially remove portions of the coated surface which have not been selectively treated.Type: GrantFiled: September 9, 1977Date of Patent: January 1, 1980Assignee: Western Electric Company, Inc.Inventors: William M. Beckenbaugh, Patricia J. Goldman, Kim L. Morton
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Patent number: 4167601Abstract: A method of depositing a stress-free electroless copper deposit is disclosed. The method comprises contacting a catalyzed surface with a solution comprising a source of cupric ions; a reducing agent for the cupric ions; a complexing agent for the solution selected from (a) ethylenediaminetetraacetic acid, (b) a salt of (a), (c) a modified ethylenediamine acetic acid, (d) a salt of (c), and (e) a mixture of at least two of the foregoing complexing agents; a stabilizer for the solution comprising a mercury compound; and an accelerator for the solution comprising a water-soluble compound containing a cyanide radical (CN.sup.-) complexed with a metal selected from Group VIII of the Periodic Table of the Elements.Type: GrantFiled: November 2, 1978Date of Patent: September 11, 1979Assignee: Western Electric Company, Inc.Inventors: William M. Beckenbaugh, Kim L. Morton