Abstract: Templates for the binding and synthesis of biological molecules are disclosed. The templates according to the invention consist of an atomically flat substrate and a three-dimensional pattern formed on the substrate by the positioning of individual atoms or molecules or groups of atoms or molecules to form hillocks. The hillocks are capable of binding to complementary portions of biological molecules or their component molecules.

Abstract: Disclosed are charge coupled device shift registers having an improved regenerative charge detector. The charge detector consists of first and second non-clocked inverter stages, gating means for coupling the input of the first inverter stage to the output of the second inverter stage in response to a first clock signal, connecting means for connecting the input of the second inverter stage to the output of the first inverter stage, and feedback means for connecting the input and output of the first inverter stage in response to a second clock signal. The output of the shift register connects to the input of the first inverter stage. The registers include means for generating the first and second clock signals, and means for multiplexing the charge detector in each register to a common output.

Abstract: A dual injector, floating-gate MOS non-volatile semiconductor memory device (DIFMOS) has been fabricated, using process specifications and design rules of the same general character previously developed for single-level metal gate CMOS devices. An electron injector junction (p+/n) is avalanched to "write" a charge on the floating gate, and a hole injector junction (n+/p-) is avalanched to "erase" the charge. An MOS sensing transistor, whose gate is an extension of the floating gate, "reads" the presence or absence of charge on the floating gate. In a preferred embodiment, the hole injection means includes an MOS "bootstrap" capacitor for coupling a voltage bias to the floating gate.

Abstract: The disclosure relates to improved detectors for use in digital charge coupled device (CCD) applications as, for example, in a multiplexing system, for recreating full logic voltage levels by detecting extremely small amounts of charge available in CCD bits. This is accomplished by means of a flip-flop circuit wherein opposite nodes of the flip-flop are precharged to a predetermined intermediate level between a logical 0 and a logical 1, one of the nodes being a reference node and the other node being coupled to a CCD storage device. During sampling of the bits being read out from the CCD storage device, the detecting node of the flip-flop will have its voltage altered, either upwardly or downwardly, from the charge on the CCD being read out. This will cause an imbalance in the flip-flop and cause the flip-flop to conduct on only one side thereof, this being determined by the charge detected. In this way, a very low level signal can be detected and amplified to a full logic voltage level for readout.

Abstract: The disclosure relates to an improved detector for use in digital charge coupled device (CCD) applications for recreating full logic voltage levels by detecting extremely small amounts of charge available in CCD bits. This is accomplished by means of a flip-flop circuit wherein opposite nodes of the flip-flop are precharged to a predetermined intermediate level between a logical 0 and a logical 1, one of the nodes being a reference node and the other node being coupled to a CCD storage device. During sampling of the bits being read out from the CCD storage device, the detecting node of the flip-flop will have its voltage altered, either upwardly or downwardly, from the charge on the CCD being read out. This will cause an imbalance in the flip-flop and cause the flip-flop to conduct on only one side thereof, this being determined by the charge detected. In this way, a very low level signal can be detected and amplified to a full logic voltage level for readout.