Patents by Inventor William Oliver Mathes

William Oliver Mathes has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6657979
    Abstract: A multiplexer output cell (FIG. 1, 15) controls the operation of multiplexer input cells (100, 105) in a multistage multiplexer according to the value of a signal select input (130), and a state control input (180). A signal driver (125) having a number of logical outputs comparable to the number of stages in the multiplexer is used in conjunction with the state control signal (170, 175, 180) to control the power ON/OFF state of each cell in the multiplexer. The multiplexer input and output cells (100, 105, 150) which are in the signal path are set to a power ON condition, while the multiplexer input and output cells (100, 105, 150) which are not in the signal path are set to a power OFF position. In this manner, only those cells which are in the signal path are powered ON, resulting in significant power savings.
    Type: Grant
    Filed: August 23, 1999
    Date of Patent: December 2, 2003
    Assignee: Motorola, Inc.
    Inventors: Lalit Odhavji Patel, William Oliver Mathes, Kevin Jurek
  • Patent number: 5949248
    Abstract: A single event upset (SEU) sensitivity control system (42) dynamically hardens a digital circuit (48) to single event upsets. The sensitivity control system (42) includes an upset rate sensor (66) for detecting a quantity of particles (38) that cause single event upsets. A noise margin control circuit (70) is configured to adjust a noise margin (46) of the digital circuit (48) in response to the quantity of particles (38). Noise margin (46) is increased when a particle density (34) is high to decrease the sensitivity of the digital circuit (48) to single event upsets. Additionally, noise margin (46) is decreased when a particle density (36) is low to decrease the power consumption level of digital circuit (48).
    Type: Grant
    Filed: October 2, 1997
    Date of Patent: September 7, 1999
    Assignee: Motorola Inc.
    Inventors: Michael Philip LaMacchia, William Oliver Mathes, Bruce Alan Fette