Abstract: A method and apparatus for integrating individual III-V MMICs into a micromachined waveguide package is disclosed. MMICs are screened prior to integration, allowing only known-good die to be integrated, leading to increased yield. The method and apparatus are used to implement a micro-integrated Focal Plane Array (mFPA) technology used for sub millimeter wave (SMMW) cameras, although many other applications are possible. MMICs of different technologies may be integrated into the same micromachined package thus achieving the same level of technology integration as in multi-wafer WLP integration.

Abstract: A terahertz waveguide bandpass filter block assembly including a waveguide iris filter, a pedestal block having a pedestal channel including a first one-half portion of the iris filter, and a cover block having a cover channel including a second one-half portion of the iris filter, where the first and second one-half portions combine to define the iris filter having a plurality of poles when the pedestal block and the cover block are secured together. The assembly also includes first and second ribbon strips positioned on opposing sides and adjacent to the iris filter between the pedestal block and the cover block, where a compression force between the pedestal block and the cover block compresses the first and second ribbon strips and sets an “a” dimension of the iris filter to tune the filter to a frequency band of interest.

Abstract: A terahertz waveguide bandpass filter block assembly including a waveguide iris filter, a pedestal block having a pedestal channel including a first one-half portion of the iris filter, and a cover block having a cover channel including a second one-half portion of the iris filter, where the first and second one-half portions combine to define the iris filter having a plurality of poles when the pedestal block and the cover block are secured together. The assembly also includes first and second ribbon strips positioned on opposing sides and adjacent to the iris filter between the pedestal block and the cover block, where a compression force between the pedestal block and the cover block compresses the first and second ribbon strips and sets an “a” dimension of the iris filter to tune the filter to a frequency band of interest.

Abstract: A method and apparatus for integrating individual III-V MMICs into a micromachined waveguide package is disclosed. MMICs are screened prior to integration, allowing only known-good die to be integrated, leading to increased yield. The method and apparatus are used to implement a micro-integrated Focal Plane Array (mFPA) technology used for sub millimeter wave (SMMW) cameras, although many other applications are possible. MMICs of different technologies may be integrated into the same micromachined package thus achieving the same level of technology integration as in multi-wafer WLP integration.

Abstract: A method and apparatus for integrating individual III-V MMICs into a micromachined waveguide package is disclosed. MMICs are screened prior to integration, allowing only known-good die to be integrated, leading to increased yield. The method and apparatus are used to implement a micro-integrated Focal Plane Array (mFPA) technology used for sub millimeter wave (SMMW) cameras, although many other applications are possible. MMICs of different technologies may be integrated into the same micromachined package thus achieving the same level of technology integration as in multi-wafer WLP integration.

Abstract: A method and apparatus for integrating individual III-V MMICs into a micromachined waveguide package is disclosed. MMICs are screened prior to integration, allowing only known-good die to be integrated, leading to increased yield. The method and apparatus are used to implement a micro-integrated Focal Plane Array (mFPA) technology used for sub millimeter wave (SMMW) cameras, although many other applications are possible. MMICs of different technologies may be integrated into the same micromachined package thus achieving the same level of technology integration as in multi-wafer WLP integration.

Abstract: An integrated circuit comprising a substrate including a top-side surface and a backside surface and a plurality of circuit components fabricated on the top-side surface of the substrate. The circuit includes a plurality of electrically conductive vias extending into the substrate from the backside surface of the substrate. Some of the plurality of vias are through vias that extend completely through the substrate and make electrical contact with a circuit component on the top-side surface of the substrate and some of the plurality of vias are part-way through vias that extend only part-way through the substrate and are positioned directly opposite to a circuit component on the top-side surface of the substrate, where the part-way through vias extend at least half-way through the substrate. The number of part-way through vias is determined based on the number of part-way through vias that are necessary to suppress substrate modes in the substrate.