Patents by Inventor William R. Reohr

William R. Reohr has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9741419
    Abstract: A memory system including a content addressable memory having an array of content addressable memory elements including a plurality of rows of content addressable memory elements and a plurality of columns of content addressable memory elements is provided. Each of the content addressable memory elements further includes a first superconducting quantum interference device (SQUID) and a second superconducting quantum interference device (SQUID), where an input bit to each of the content addressable memory elements is compared with: (1) a first state of the first SQUID and (2) a second state of the second SQUID to generate an output signal. The memory system further includes a Josephson magnetic random access memory (JMRAM), coupled to the content addressable memory.
    Type: Grant
    Filed: February 20, 2017
    Date of Patent: August 22, 2017
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: William R Reohr, Brian R Konigsburg
  • Patent number: 9613699
    Abstract: A memory system including a content addressable memory having an array of content addressable memory elements including a plurality of rows of content addressable memory elements and a plurality of columns of content addressable memory elements is provided. Each of the content addressable memory elements further includes a first superconducting quantum interference device (SQUID) and a second superconducting quantum interference device (SQUID), where an input bit to each of the content addressable memory elements is compared with: (1) a first state of the first SQUID and (2) a second state of the second SQUID to generate an output signal. The memory system further includes a Josephson magnetic random access memory (JMRAM), coupled to the content addressable memory.
    Type: Grant
    Filed: April 22, 2016
    Date of Patent: April 4, 2017
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: William R. Reohr, Brian R. Konigsburg
  • Patent number: 9612612
    Abstract: A wide bandwidth resonant clock distribution comprises a clock grid configured to distribute a clock signal to a plurality of components of an integrated circuit and a tunable sector buffer configured to receive the clock signal and provide an output to the clock grid. The tunable sector buffer is configured to set latency and slew rate of the clock signal based on an identified resonant or non-resonant mode.
    Type: Grant
    Filed: May 7, 2015
    Date of Patent: April 4, 2017
    Assignee: International Business Machines Corporation
    Inventors: Thomas J. Bucelot, Alan J. Drake, Robert A. Groves, Jason D. Hibbeler, Yong I. Kim, Liang-Teck Pang, William R. Reohr, Phillip J. Restle, Michael G. R. Thomson
  • Patent number: 9317223
    Abstract: A method for controlling the storage of data among multiple regional storage centers coupled through a network in a global storage system is provided. The method includes steps of: defining at least one dataset comprising at least a subset of the data stored in the global storage system; defining at least one ruleset for determining where to store the dataset; obtaining information regarding a demand for the dataset through one or more data requesting entities operating in the global storage system; and determining, as a function of the ruleset, information regarding a location for storing the dataset among regional storage centers having available resources that reduces the total distance traversed by the dataset in serving at least a given one of the data requesting entities and/or reduces the latency of delivery of the dataset to the given one of the data requesting entities.
    Type: Grant
    Filed: December 17, 2012
    Date of Patent: April 19, 2016
    Assignee: International Business Machines Corporation
    Inventors: William R. Reohr, Birgit M. Pfitzmann, Kevin M. Kingsbury, Laura A. Richardson, Peter Urbanetz, William B. Yoes
  • Patent number: 9311020
    Abstract: A method for controlling the storage of data among multiple regional storage centers coupled through a network in a global storage system is provided. The method includes steps of: defining at least one dataset comprising at least a subset of the data stored in the global storage system; defining at least one ruleset for determining where to store the dataset; obtaining information regarding a demand for the dataset through one or more data requesting entities operating in the global storage system; and determining, as a function of the ruleset, information regarding a location for storing the dataset among regional storage centers having available resources that reduces the total distance traversed by the dataset in serving at least a given one of the data requesting entities and/or reduces the latency of delivery of the dataset to the given one of the data requesting entities.
    Type: Grant
    Filed: August 19, 2013
    Date of Patent: April 12, 2016
    Assignee: International Business Machines Corporation
    Inventors: William R. Reohr, Birgit M. Pfitzmann, Kevin M. Kingsbury, Laura A. Richardson, Peter Urbanetz, William B. Yoes
  • Patent number: 9268886
    Abstract: Recycling energy in a clock distribution network is provided. A method includes creating a resonant clocking circuit including a clock grid. The method further includes providing resonant structures distributed in the clock grid. The method further includes providing switches that control the resonant structures to switch between a non-resonant mode and a resonant mode. The method further includes determining a switch size that minimizes power consumption of the resonant clocking circuit by iteratively increasing sizes of the switches and, for each iterative increase in size, determining power consumed by the resonant clocking circuit.
    Type: Grant
    Filed: December 20, 2013
    Date of Patent: February 23, 2016
    Assignee: GLOBALFOUNDRIES INC.
    Inventors: Jason D. Hibbeler, William R. Reohr, Phillip J. Restle
  • Patent number: 9262507
    Abstract: A classification system executing on one or more computer systems includes a processor and a memory coupled to the processor. The memory includes a discovery engine configured to navigate through non-volatile memory storage to discover an identity and location of one or more files in one or more computer storage systems by tracing the one or more files from file system mount points through file system objects and to disk objects. A classifier is configured to classify the one or more the files into a classification category. The one or more files are associated with the classification category and stored in at least one data structure. The one or more files are classified using an installed storage driver method. Methods are also provided.
    Type: Grant
    Filed: April 28, 2015
    Date of Patent: February 16, 2016
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Nikolai Joukov, Amitkumar M. Paradkar, Birgit M. Pfitzmann, William R. Reohr, Peter Urbanetz
  • Publication number: 20150242489
    Abstract: A classification system executing on one or more computer systems includes a processor and a memory coupled to the processor. The memory includes a discovery engine configured to navigate through non-volatile memory storage to discover an identity and location of one or more files in one or more computer storage systems by tracing the one or more files from file system mount points through file system objects and to disk objects. A classifier is configured to classify the one or more the files into a classification category. The one or more files are associated with the classification category and stored in at least one data structure. The one or more files are classified using an installed storage driver method. Methods are also provided.
    Type: Application
    Filed: April 28, 2015
    Publication date: August 27, 2015
    Inventors: NIKOLAI JOUKOV, AMITKUMAR M. PARADKAR, BIRGIT M. PFITZMANN, WILLIAM R. REOHR, PETER URBANETZ
  • Publication number: 20150234422
    Abstract: A wide bandwidth resonant clock distribution comprises a clock grid configured to distribute a clock signal to a plurality of components of an integrated circuit and a tunable sector buffer configured to receive the clock signal and provide an output to the clock grid. The tunable sector buffer is configured to set latency and slew rate of the clock signal based on an identified resonant or non-resonant mode.
    Type: Application
    Filed: May 7, 2015
    Publication date: August 20, 2015
    Inventors: Thomas J. Bucelot, Alan J. Drake, Robert A. Groves, Jason D. Hibbeler, Yong I. Kim, Liang-Teck Pang, William R. Reohr, Phillip J. Restle, Michael G.R. Thomson
  • Patent number: 9058130
    Abstract: A wide bandwidth resonant clock distribution comprises a clock grid configured to distribute a clock signal to a plurality of components of an integrated circuit and a tunable sector buffer configured to receive the clock signal and provide an output to the clock grid. The tunable sector buffer is configured to set latency and slew rate of the clock signal based on an identified resonant or non-resonant mode.
    Type: Grant
    Filed: February 5, 2013
    Date of Patent: June 16, 2015
    Assignee: International Business Machines Corporation
    Inventors: Thomas J. Bucelot, Alan J. Drake, Robert A. Groves, Jason D. Hibbeler, Yong I. Kim, Liang-Teck Pang, William R. Reohr, Phillip J. Restle, Michael G. R. Thomson
  • Patent number: 9054682
    Abstract: A wide bandwidth resonant clock distribution comprises a clock grid configured to distribute a clock signal to a plurality of components of an integrated circuit, a tunable sector buffer configured to receive the clock signal and provide an output to the clock grid, at least one inductor, at least one tunable resistance switch, and a capacitor network. The tunable sector buffer is programmable to set latency and slew rate of the clock signal. The inductor, tunable resistance switch, and capacitor network are connected between the clock grid and a reference voltage. The at least one tunable resistance switch is programmable to dynamically switch the at least one inductor in or out of the clock distribution to effect at least one resonant mode of operation or a non-resonant mode of operation based on a frequency of the clock signal.
    Type: Grant
    Filed: February 5, 2013
    Date of Patent: June 9, 2015
    Assignee: International Business Machines Corporation
    Inventors: Thomas J. Bucelot, Alan J. Drake, Robert A. Groves, Jason D. Hibbeler, Yong I. Kim, Liang-Teck Pang, William R. Reohr, Phillip J. Restle, Michael G. R. Thomson
  • Patent number: 9037587
    Abstract: A classification system executing on one or more computer systems includes a processor and a memory coupled to the processor. The memory includes a discovery engine configured to navigate through non-volatile memory storage to discover an identity and location of one or more files in one or more computer storage systems by tracing the one or more files from file system mount points through file system objects and to disk objects. A classifier is configured to classify the one or more the files into a classification category. The one or more files are associated with the classification category and stored in at least one data structure. Methods are also provided.
    Type: Grant
    Filed: May 10, 2012
    Date of Patent: May 19, 2015
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Nikolai Joukov, Amitkumar M. Paradkar, Birgit M. Pfitzmann, William R. Reohr, Peter Urbanetz
  • Patent number: 8887118
    Abstract: Recycling energy in a clock distribution network is provided. A method includes creating a resonant clocking circuit including a clock grid. The method further includes providing resonant structures distributed in the clock grid. The method further includes providing switches that control the resonant structures to switch between a non-resonant mode and a resonant mode. The method further includes determining a switch size that minimizes power consumption of the resonant clocking circuit by iteratively increasing sizes of the switches and, for each iterative increase in size, determining power consumed by the resonant clocking circuit.
    Type: Grant
    Filed: February 22, 2013
    Date of Patent: November 11, 2014
    Assignee: International Business Machines Corporation
    Inventors: Jason D. Hibbeler, William R. Reohr, Phillip J. Restle
  • Patent number: 8850373
    Abstract: Recycling energy in a clock distribution network is provided. A method includes creating a resonant clocking circuit including a clock grid. The method further includes providing resonant structures distributed in the clock grid. The method further includes providing switches that control the resonant structures to switch between a non-resonant mode and a resonant mode. The method further includes determining a switch size that minimizes power consumption of the resonant clocking circuit by iteratively increasing sizes of the switches and, for each iterative increase in size, determining power consumed by the resonant clocking circuit.
    Type: Grant
    Filed: December 20, 2013
    Date of Patent: September 30, 2014
    Assignee: International Business Machines Corporation
    Inventors: Jason D. Hibbeler, William R. Reohr, Phillip J. Restle
  • Publication number: 20140245244
    Abstract: Recycling energy in a clock distribution network is provided. A method includes creating a resonant clocking circuit including a clock grid. The method further includes providing resonant structures distributed in the clock grid. The method further includes providing switches that control the resonant structures to switch between a non-resonant mode and a resonant mode. The method further includes determining a switch size that minimizes power consumption of the resonant clocking circuit by iteratively increasing sizes of the switches and, for each iterative increase in size, determining power consumed by the resonant clocking circuit.
    Type: Application
    Filed: December 20, 2013
    Publication date: August 28, 2014
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Jason D. HIBBELER, William R. REOHR, Phillip J. RESTLE
  • Publication number: 20140240021
    Abstract: Recycling energy in a clock distribution network is provided. A method includes creating a resonant clocking circuit including a clock grid. The method further includes providing resonant structures distributed in the clock grid. The method further includes providing switches that control the resonant structures to switch between a non-resonant mode and a resonant mode. The method further includes determining a switch size that minimizes power consumption of the resonant clocking circuit by iteratively increasing sizes of the switches and, for each iterative increase in size, determining power consumed by the resonant clocking circuit.
    Type: Application
    Filed: December 20, 2013
    Publication date: August 28, 2014
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Jason D. HIBBELER, William R. REOHR, Phillip J. RESTLE
  • Publication number: 20140245250
    Abstract: Recycling energy in a clock distribution network is provided. A method includes creating a resonant clocking circuit including a clock grid. The method further includes providing resonant structures distributed in the clock grid. The method further includes providing switches that control the resonant structures to switch between a non-resonant mode and a resonant mode. The method further includes determining a switch size that minimizes power consumption of the resonant clocking circuit by iteratively increasing sizes of the switches and, for each iterative increase in size, determining power consumed by the resonant clocking circuit.
    Type: Application
    Filed: February 22, 2013
    Publication date: August 28, 2014
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Jason D. HIBBELER, William R. REOHR, Phillip J. RESTLE
  • Publication number: 20140218087
    Abstract: A wide bandwidth resonant clock distribution comprises a clock grid configured to distribute a clock signal to a plurality of components of an integrated circuit, a tunable sector buffer configured to receive the clock signal and provide an output to the clock grid, at least one inductor, at least one tunable resistance switch, and a capacitor network. The tunable sector buffer is programmable to set latency and slew rate of the clock signal. The inductor, tunable resistance switch, and capacitor network are connected between the clock grid and a reference voltage. The at least one tunable resistance switch is programmable to dynamically switch the at least one inductor in or out of the clock distribution to effect at least one resonant mode of operation or a non-resonant mode of operation based on a frequency of the clock signal.
    Type: Application
    Filed: February 5, 2013
    Publication date: August 7, 2014
    Applicant: International Business Machines Corporation
    Inventors: Thomas J. Bucelot, Alan J. Drake, Robert A. Groves, Jason D. Hibbeler, Yong I. Kim, Liang-Teck Pang, William R. Reohr, Phillip J. Restle, Michael G.R. Thomson
  • Publication number: 20140223210
    Abstract: A wide bandwidth resonant clock distribution comprises a clock grid configured to distribute a clock signal to a plurality of components of an integrated circuit and a tunable sector buffer configured to receive the clock signal and provide an output to the clock grid. The tunable sector buffer is configured to set latency and slew rate of the clock signal based on an identified resonant or non-resonant mode.
    Type: Application
    Filed: February 5, 2013
    Publication date: August 7, 2014
    Applicant: International Business Machines Corporation
    Inventors: Thomas J. Bucelot, Alan J. Drake, Robert A. Groves, Jason D. Hibbeler, Yong I. Kim, Liang-Teck Pang, William R. Reohr, Phillip J. Restle, Michael G.R. Thomson
  • Publication number: 20140167832
    Abstract: Described is an integrated circuit having a clock distribution network capable of transitioning from a non-resonant clock mode to a first resonant clock mode Transitions between clock modes or between various resonant clock frequencies are done gradually over a series of clock cycles. In example, when transitioning from a non-resonant clock mode to a first resonant clock mode, a strength of a clock sector driver is reduced over a series of clock cycles, and individual ones of a plurality of resonant switches associated with resonant circuits are modified in coordination with reducing the strength of the clock sector driver.
    Type: Application
    Filed: December 19, 2012
    Publication date: June 19, 2014
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Thomas J. Bucelot, Alan Drake, Joshua D. Friedrich, Jason D. Hibbeler, Liang-Teck Pang, William R. Reohr, Phillip John Restle, Gregory S. Still, Michael G.R. Thomson