Abstract: A Power-on Reset circuit is described. The Power-on Reset is formed by two comparators and a latch circuit. The Power-on Reset circuit will de-assert the reset state once the supply voltage reaches a first reference point and re-assert the reset state once the supply voltage drops below a second reference point. The Power-on Reset circuit disclosed further includes circuits to initialize properly and to ensure the regulator voltage and the bandgap voltages are stable and above the ground level voltage.

Abstract: A Power-on Reset circuit is described. The Power-on Reset is formed by two comparators and a latch circuit. The Power-on Reset circuit will de-assert the reset state once the supply voltage reaches a first reference point and re-assert the reset state once the supply voltage drops below a second reference point. The Power-on Reset circuit disclosed further includes circuits to initialize properly and to ensure the regulator voltage and the bandgap voltages are stable and above the ground level voltage.

Abstract: A Power-on Reset circuit is described. The Power-on Reset is formed by two comparators and a latch circuit. The Power-on Reset circuit will de-assert the reset state once the supply voltage reaches a first reference point and re-assert the reset state once the supply voltage drops below a second reference point. The Power-on Reset circuit disclosed further includes circuits to initialize properly and to ensure the regulator voltage and the bandgap voltages are stable and above the ground level voltage.

Abstract: Disclosed is a fractional bandgap circuit and method to provide a same reference voltage value in a variety of circumstances of operation, including variations in manufacturing process, temperature, and a supply voltage. The disclosed fractional bandgap circuit and method also allows for low supply voltage operation within a compact layout area.

Abstract: Disclosed is a fractional bandgap circuit and method to provide a same reference voltage value in a variety of circumstances of operation, including variations in manufacturing process, temperature, and a supply voltage. The disclosed fractional bandgap circuit and method also allows for low supply voltage operation within a compact layout area.

Abstract: A Power-on Reset circuit is described. The Power-on Reset is formed by two comparators and a latch circuit. The Power-on Reset circuit will de-assert the reset state once the supply voltage reaches a first reference point and re-assert the reset state once the supply voltage drops below a second reference point. The Power-on Reset circuit disclosed further includes circuits to initialize properly and to ensure the regulator voltage and the bandgap voltages are stable and above the ground level voltage.

Abstract: The present invention relates to the field of electronics. More particularly, forms of the present invention relate to systems, methods and circuits for generating a signal. A system, method and circuit for generating a signal are described. Forms of this system, method and circuit provide clock duty cycle improvement with no frequency reduction. Some such forms provide a clock signal approaching or achieving 50 percent with no significant frequency departure, reduction, etc. from a generated clock. One form of the present invention uses two similar clock signals that oscillate at the same frequency, but effectively inverted one from another. In one such form, the inverted signals are generated with a voltage controlled oscillator having differential stages.