Abstract: Methods and systems for remotely detecting gases and emissions of gases are provided. Data is collected from a scene using a sensor system. The data is initially optionally processed as 1D data to remove noise, and is then assigned a confidence value by processing the 1D data using a neural network. The confidence value is related to a likelihood that an emission has been detected at a particular location. The processed 1D data, including the confidence value, is gridded into 2D space. The 2D data is then processed using a neural network to assign a 2D confidence value. The 2D data can be fused with RGB data to produce a map of emission source locations. The data identifying emissions can also be processed using a neural network to determine and output emission rate data.

Abstract: Methods and systems for remotely detecting gases and emissions of gases are provided. Data is collected from a scene using a sensor system. The data is initially optionally processed as 1D data to remove noise, and is then assigned a confidence value by processing the 1D data using a neural network. The confidence value is related to a likelihood that an emission has been detected at a particular location. The processed 1D data, including the confidence value, is gridded into 2D space. The 2D data is then processed using a neural network to assign a 2D confidence value. The 2D data can be fused with RGB data to produce a map of emission source locations. The data identifying emissions can also be processed using a neural network to determine and output emission rate data.

Abstract: An integrated circuit device includes a semiconductor component coupled with a lead frame, and an integrated circuit package encompassing at least a portion of the semiconductor component. The package has a first surface and a second surface, and side surfaces, where the first surface is opposite the second surface. A parting line of the integrated circuit package is offset toward the second surface of the package, where the first surface optionally comprises the bottom surface of the package. The first surface of the package has one or more recessed areas.

Abstract: A method used for marking a semiconductor wafer or device. The method and apparatus have particular application to wafers or devices which have been subjected to a thinning process, including back grinding in particular. The present method comprises reducing the cross-section of a wafer or device, applying a tape having optical energy-markable properties over a surface or edge of the wafer or device, and exposing the tape to an optical energy source to create an identifiable mark. A method for manufacturing an integrated circuit chip and for identifying a known good die are also disclosed. The apparatus of the present invention comprises a multilevel laser-markable tape for application to a bare semiconductor die. In the apparatus, an adhesive layer of the tape provides a homogenous surface for marking subsequent to exposure to electromagnetic radiation.

Abstract: A system for fabricating semiconductor components includes mating mold cavity plates having mold cavities configured to mold body segments of the semiconductor components on either side of a leadframe. The mold cavity plates also include runners configured to direct molding compound between the mold cavities and into the corners of the mold cavities. The runners prevent trapped air from accumulating in the corners of the mold cavities, and eliminate the need for air vents in the corners. The mold cavity plates also include dummy mold cavities configured to form dummy segments on the leadframe, and air vents in flow communication with the dummy segments. The dummy mold cavities are configured to collect trapped air, and to direct the trapped air through the air vents to atmosphere. Each dummy mold cavity has only a single associated air vent, such that cleaning is facilitated, and flash particles from the air vents are reduced.

Abstract: A system for fabricating semiconductor components includes mating mold cavity plates having mold cavities configured to mold body segments of the semiconductor components on either side of a leadframe. The mold cavity plates also include runners configured to direct molding compound between the mold cavities and into the corners of the mold cavities. The runners prevent trapped air from accumulating in the corners of the mold cavities, and eliminate the need for air vents in the corners. The mold cavity plates also include dummy mold cavities configured to form dummy segments on the leadframe, and air vents in flow communication with the dummy segments. The dummy mold cavities are configured to collect trapped air, and to direct the trapped air through the air vents to atmosphere. Each dummy mold cavity has only a single associated air vent, such that cleaning is facilitated, and flash particles from the air vents are reduced.

Abstract: An integrated circuit device includes a semiconductor component coupled with a lead frame, and an integrated circuit package encompassing at least a portion of the semiconductor component. The package has a first surface and a second surface, and side surfaces, where the first surface is opposite the second surface. A parting line of the integrated circuit package is offset toward the second surface of the package, where the first surface optionally comprises the bottom surface of the package. The first surface of the package has one or more recessed areas.