Patents by Inventor William Y. Jan

William Y. Jan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6458411
    Abstract: Mechanically compliant bumps for flip-chip bonding have a base that is deposited, for example, on the contact pad of a semiconductor chip. A thin wall depends from the periphery of the upper surface of base. The wall advantageously completely encircles the upper surface of the mechanically compliant bump. The wall, which is capable of flexing or deforming under pressure provides mechanical compliance. The wall is able to flex or deform under pressure even if the bump is formed from high-temperature metal. These mechanically compliant bumps facilitate sound electrical connections even when an electronics device is brought into contact for bonding out of parallel.
    Type: Grant
    Filed: October 5, 2001
    Date of Patent: October 1, 2002
    Assignee: Aralight, Inc.
    Inventors: Keith W. Goossen, William Y. Jan
  • Patent number: 6388322
    Abstract: Mechanically compliant bumps for flip-chip bonding have a base that is deposited, for example, on the contact pad of a semiconductor chip. A thin wall depends from the periphery of the upper surface of base. The wall advantageously completely encircles the upper surface of the mechanically compliant bump. The wall, which is capable of flexing or deforming under pressure provides mechanical compliance. The wall is able to flex or deform under pressure even if the bump is formed from high-temperature metal. These mechanically compliant bumps facilitate sound electrical connections even when an electronics device is brought into contact for bonding out of parallel.
    Type: Grant
    Filed: January 17, 2001
    Date of Patent: May 14, 2002
    Assignee: Aralight, Inc.
    Inventors: Keith W. Goossen, William Y. Jan
  • Patent number: 5627383
    Abstract: Optoelectronic devices such as photodetectors, modulators and lasers with improved optical properties are provided with an atomically smooth transition between the buried conductive layer and quantum-well-diode-containing intrinsic region of a p-i-n structure. The buried conductive layer is grown on an underlying substrate utilizing a surfactant-assisted growth technique. The dopant and dopant concentration are selected, as a function of the thickness of the conductive layer to be formed, so that a surface impurity concentration of from 0.1 to 1 monolayer of dopant atoms is provided. The presence of the impurities promotes atomic ordering at the interface between the conductive layer and the intrinsic region, and subsequently results in sharp barriers between the alternating layers comprising the quantum-well-diodes of the intrinsic layer.
    Type: Grant
    Filed: February 23, 1996
    Date of Patent: May 6, 1997
    Assignee: Lucent Technologies Inc.
    Inventors: John E. Cunningham, Keith W. Goossen, William Y. Jan, Michael D. Williams
  • Patent number: 5589404
    Abstract: A monolithically integrated, optoelectronic VLSI circuit is fabricated by growing optical devices on the compound semiconductor surface of a VLSI chip or wafer having pre-existing electronic devices formed thereon. In accordance with an illustrative embodiment of the present invention, a large array of surface normal optical modulating devices such as multiple quantum well modulators is grown on an impurity free surface of a VLSI chip having an array of FETs already provided thereon. The growth of such devices takes place at temperatures below 430.degree. C. on a compound semiconductor surface which has a highly ordered atomic structure. An optoelectronic switch constructed in this manner is capable of addressing electronic chips in systems handling 10,000 or more input/output optical beams.
    Type: Grant
    Filed: August 1, 1994
    Date of Patent: December 31, 1996
    Assignee: Lucent Technologies Inc.
    Inventors: John E. Cunningham, Keith W. Goossen, William Y. Jan, Rajiv N. Pathak, James A. Walker
  • Patent number: 5510277
    Abstract: A method for desorbing the surface oxide on a silicon substrate is performed by implanting particles such at atomic or ionic hydrogen into the oxide layer on the silicon substrate. The oxide is then removed by breaking the bonds between the silicon and oxygen atoms within the oxide. The bonds may be broken by heating the substrate, for example. The temperature to which the substrate must be raised is substantially less than the temperature required to desorb an oxide layer that has not undergone an implantation step. In one particular example, the particles implanted into the oxide surface are hydrogen ions generated by electron cyclotron resonance.
    Type: Grant
    Filed: June 29, 1994
    Date of Patent: April 23, 1996
    Assignee: AT&T Corp.
    Inventors: John E. Cunningham, Keith W. Goossen, William Y. Jan, James A. Walker
  • Patent number: 5468689
    Abstract: A technique is described for the preparation of a thin film of a silicon nitride diffusion barrier to gallium on a silicon integrated circuit chip. The technique involves reacting nitrogen and silane in a ratio of 53:1 to 300:1 in a plasma enhanced chemical vapor deposition apparatus. The described technique is of interest for use in the monolithic integration of interconnected GaAs/AlGaAs double heterostructures, modulators and silicon MOSFET structures.
    Type: Grant
    Filed: November 16, 1993
    Date of Patent: November 21, 1995
    Assignee: AT&T Corp.
    Inventors: John E. Cunningham, Keith W. Goossen, William Y. Jan, James A. Walker
  • Patent number: 5330629
    Abstract: A manufacturing method which includes forming a metallic, aluminum-containing layer adherent to a surface of a body. The method includes the steps of depositing aluminum on the surface from an aluminum-containing vapor, and during the aluminum-depositing step, the further step of depositing arsenic, phosphorus, or antimony on the surface from the vapor.
    Type: Grant
    Filed: December 15, 1992
    Date of Patent: July 19, 1994
    Assignee: AT&T Bell Laboratories
    Inventors: John E. Cunningham, William Y. Jan, John A. Rentschler, Colin A. Warwick
  • Patent number: 5093695
    Abstract: In a semiconductor optical modulator, two semiconductor materials having different refractive indices are grown in an alternating sequence of layers to form a semiconductor mirror wherein each layer has approximately a quarter wave thickness for a predetermined wavelength. Delta doping is performed at each heterointerface. The delta doping conductivity type alternates from one heterointerface to the next. Lateral surface contacts are selectively made to the n-type heterointerfaces on one edge of the mirror and to the p-type heterointerfaces on the other edge of the mirror. An interleaved ohmic contact structure results within the modulator. By applying a nominally low voltage to the lateral surface contacts, it is possible to effect refractive index changes in the layers so that the mirror performs reflection or transmission of an impinging light beam.
    Type: Grant
    Filed: May 18, 1990
    Date of Patent: March 3, 1992
    Assignee: AT&T Bell Laboratories
    Inventors: John E. Cunningham, Keith W. Goossen, William Y. Jan