Patents by Inventor Winfried Sabisch

Winfried Sabisch has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20080085606
    Abstract: In one aspect, the invention provides a fabrication method. Before the fabrication of the structure, a mask layer, for example a hard mask, is applied to a layer. The mask layer has at least two layers composed of materials that can be etched selectively with respect to one another. In a first etching process, the structure is introduced into the layer. Subsequently, the first etching process is interrupted at a point in time in order to etch away a topmost layer of the hard mask selectively with respect to the underlying layer by means of a second etching process and, subsequently, the first etching process is continued for fabricating the structure with the new topmost layer.
    Type: Application
    Filed: October 5, 2007
    Publication date: April 10, 2008
    Inventors: Dominik Fischer, Werner Jacobs, Daniel Koehler, Alfred Kersch, Winfried Sabisch
  • Patent number: 7022209
    Abstract: A PVD method and a PVD apparatus use a rotating magnetic field in order to increase the yield. The magnetic field is provided such that it essentially vanishes, at least in a time average, outside a rotation axis of the magnetic field in sectors of the target region of the PVD apparatus. In this manner the PVD method and the PVD apparatus achieve a uniform coating.
    Type: Grant
    Filed: July 16, 2003
    Date of Patent: April 4, 2006
    Assignee: Infineon Technologies AG
    Inventors: Winfried Sabisch, Alfred Kersch, Georg Schulze-Icking, Thomas Witke, Ralf Zedlitz
  • Publication number: 20050016468
    Abstract: An inner contour of the compensation frame (2) is configured in polygonal fashion in order to receive the substrate (1). With the substrate (1) having been received, the compensation frame (2) encloses the substrate (1) at the outer edge thereof. A partial region (3a) of an upper main area (3) of the compensation frame (2) runs at a given height (h) above the plane of an upper main area (1a) of the substrate (1) when the latter has been received into the compensation frame (2). Moreover, a further partial region (3b) of the upper main area (3) of the compensation frame runs essentially at the same height as the plane of the upper main area (3) of the substrate (1) when the latter has been received into the compensation frame (2).
    Type: Application
    Filed: December 23, 2003
    Publication date: January 27, 2005
    Inventors: Guenther Ruhl, Gerhard Prechtl, Winfried Sabisch, Alfred Kersch, Pavel Nesladek, Fritz Gans, Rex Anderson
  • Publication number: 20040072447
    Abstract: A method of aligning a second layer to a first layer of a semiconductor structure by forming a first layer of a wafer having a distinguished feature via a first etching process that employs a first ionized gas generating machine. Forming a second layer having a circuit pattern via a second etching process that employs a second ionized gas generating machine, wherein the forming the second layer includes minimizing relative shifting between the distinguished feature located at an edge of the wafer for the first layer and the second circuit pattern located at the edge of the wafer for the second layer.
    Type: Application
    Filed: June 3, 2003
    Publication date: April 15, 2004
    Inventors: William Roberts, Diem-Thy Ngu-Uyen Tran, Paul Jowett, Nicholas Clements, Igor Jekauc, Karen Anne Davidson, Winfried Sabisch
  • Publication number: 20040011640
    Abstract: A PVD method and a PVD apparatus use a rotating magnetic field in order to increase the yield. The magnetic field is provided such that it essentially vanishes, at least in a time average, outside a rotation axis of the magnetic field in sectors of the target region of the PVD apparatus. In this manner the PVD method and the PVD apparatus achieve a uniform coating.
    Type: Application
    Filed: July 16, 2003
    Publication date: January 22, 2004
    Inventors: Winfried Sabisch, Alfred Kersch, Georg Schulze-Icking, Thomas Witke, Ralf Zedlitz
  • Publication number: 20030019837
    Abstract: A method and an apparatus for implementing the method produces at least one depression as a microstructure, in particular, a deep trench, in a semiconductor material, in particular, during the production of DRAMs and heats an area of at least one depression in the semiconductor material during an etching step, at least from time to time and/or locally. Such a configuration makes it possible to produce depressions in semiconductor materials efficiently, in particular, those with a high aspect ratio.
    Type: Application
    Filed: July 30, 2002
    Publication date: January 30, 2003
    Inventors: Alfred Kersch, Winfried Sabisch