Abstract: A method for forming a semiconductor device is provided. The method includes removing a first portion of a substrate to form a recess in the substrate. The method includes forming an epitaxy layer in the recess. The epitaxy layer and the substrate are made of different semiconductor materials. The method includes forming a stacked structure of a plurality of first semiconductor layers and a plurality of second semiconductor layers alternately stacked over the substrate and the epitaxy layer. The method includes removing a second portion of the stacked structure and a third portion of the epitaxy layer to form trenches passing through the stacked structure and extending into the epitaxy layer. The stacked structure is divided into a first fin element and a second fin element by the trenches, and the first fin element and the second fin element are over the substrate and the epitaxy layer respectively.

Abstract: A method for forming a semiconductor device is provided. The method includes forming a first recess in a substrate. The method includes forming a first semiconductor layer into the first recess. The first semiconductor layer and the substrate are made of different materials, and a first top surface of the first semiconductor layer is lower than a second top surface of the substrate. The method includes forming a second semiconductor layer over the first top surface and the second top surface, wherein a third top surface of the second semiconductor layer over the first top surface is substantially level with the second top surface of the substrate, and the second semiconductor layer and the substrate are made of different materials. The method includes forming a third semiconductor layer over the second semiconductor layer. The third semiconductor layer and the second semiconductor layer are made of different materials.

Abstract: Present disclosure provides gate-all-around structure including a semiconductor fin having a top surface, a first nanowire over the top surface, a first space between the top surface and the first nanowire, an Nth nanowire and an (N+1)th nanowire over the first nanowire, and a second space between the Nth nanowire and the (N+1)th nanowire. The first space is greater than the second space. Present disclosure also provides a method for manufacturing the gate-all-around structure described herein.

Abstract: A method for forming a semiconductor device is provided. The method includes removing a first portion of a substrate to form a recess in the substrate. The method includes forming an epitaxy layer in the recess. The epitaxy layer and the substrate are made of different semiconductor materials. The method includes forming a stacked structure of a plurality of first semiconductor layers and a plurality of second semiconductor layers alternately stacked over the substrate and the epitaxy layer. The method includes removing a second portion of the stacked structure and a third portion of the epitaxy layer to form trenches passing through the stacked structure and extending into the epitaxy layer, The stacked structure is divided into a first fin element and a second fin element by the trenches, and the first fin element and the second fin element are over the substrate and the epitaxy layer respectively.

Abstract: A semiconductor device comprises a substrate having an N-type field effect transistor (NFET) region and a P-type field effect transistor (PFET) region, a plurality of first nanowires in the PFET region and arranged in a first direction substantially perpendicular to the substrate and a plurality of second nanowires in the NFET region and arranged in the first direction. A composition of the first nanowires is different from a composition of the second nanowires, and one of the first nanowires is substantially aligned with one of the second nanowires in a second direction substantially perpendicular to the first direction.

Abstract: A method for forming a semiconductor device is provided. The method includes forming a first recess in a substrate. The method includes forming a first semiconductor layer into the first recess. The first semiconductor layer and the substrate are made of different materials, and a first top surface of the first semiconductor layer is lower than a second top surface of the substrate. The method includes forming a second semiconductor layer over the first top surface and the second top surface, wherein a third top surface of the second semiconductor layer over the first top surface is substantially level with the second top surface of the substrate, and the second semiconductor layer and the substrate are made of different materials. The method includes forming a third semiconductor layer over the second semiconductor layer. The third semiconductor layer and the second semiconductor layer are made of different materials.

Abstract: Semiconductor structures and methods for forming the same are provided. The semiconductor structure includes a substrate and a first fin and a second fin formed over the substrate. The semiconductor structure further includes a first anti-punch through region formed in the first fin and a second anti-punch through region formed in the second fin and first nanostructures formed over the first fin and second nanostructures formed over the second fin. The semiconductor structure further includes a barrier layer formed over the second anti-punch through region and a first gate formed around the first nanostructures. The semiconductor structure further includes a second gate formed around the second nanostructures. In addition, an interface between the barrier layer and the second anti-punch through region is higher than an interface between the first anti-punch through region and the first gate.

Abstract: A method of semiconductor fabrication includes positioning a substrate on a susceptor in a chamber and growing an epitaxial feature on the substrate. The growing includes providing UV radiation to a first region of a surface of the substrate and while providing the UV radiation, growing a first portion of the epitaxial feature on the first region of the surface while concurrently growing a second portion of the epitaxial feature on a second region of the surface of the substrate. The first portion of the epitaxial feature can be greater in thickness than the second portion of the epitaxial feature.

Abstract: Present disclosure provides a semiconductor structure including a first transistor and a second transistor. The first transistor includes a semiconductor substrate having a top surface and a first anti-punch through region doped with a first conductivity dopant at the top surface. The first transistor further includes a first channel over the top surface of the semiconductor substrate by a first distance. The second transistor includes a second anti-punch through region doped with a second conductivity dopant at the top surface of the semiconductor substrate. The second transistor further includes a second channel over the top surface of the semiconductor substrate by a second distance greater than the first distance. Present disclosure also provides a method for manufacturing the semiconductor structure described herein.

Abstract: Present disclosure provides gate-all-around structure including a semiconductor fin having a top surface, a first nanowire over the top surface, a first space between the top surface and the first nanowire, an Nth nanowire and an (N+1)th nanowire over the first nanowire, and a second space between the Nth nanowire and the (N+1)th nanowire. The first space is greater than the second space. Present disclosure also provides a method for manufacturing the gate-all-around structure described herein.

Abstract: A semiconductor device comprises a substrate having an N-type field effect transistor (NFET) region and a P-type field effect transistor (PFET) region, a plurality of first nanowires in the PFET region and arranged in a first direction substantially perpendicular to the substrate and a plurality of second nanowires in the NFET region and arranged in the first direction. A composition of the first nanowires is different from a composition of the second nanowires, and one of the first nanowires is substantially aligned with one of the second nanowires in a second direction substantially perpendicular to the first direction.

Abstract: Present disclosure provides a semiconductor structure including a first transistor and a second transistor. The first transistor includes a semiconductor substrate having a top surface and a first anti-punch through region doped with a first conductivity dopant at the top surface. The first transistor further includes a first channel over the top surface of the semiconductor substrate by a first distance. The second transistor includes a second anti-punch through region doped with a second conductivity dopant at the top surface of the semiconductor substrate. The second transistor further includes a second channel over the top surface of the semiconductor substrate by a second distance greater than the first distance. Present disclosure also provides a method for manufacturing the semiconductor structure described herein.

Abstract: Methods and devices of the invention perform an optical concentration by an expansion of usable spectral width of the incident energy. Preferred methods and devices of the invention concentrate optical energy by tuning it into a narrow spectral width to match the bandgap of another system component, such as an optical fiber, an optical sensor or a photovoltaic device that converts the optical energy. Embodiments of the invention include methods and devices for the spectral concentration of multi-wavelength light and subsequent transport of the concentrated output light.