Abstract: A display device includes a first substrate including light-emitting elements disposed on one surface thereof; a second substrate bonded to an opposite surface to the one surface of the first substrate; a plurality of side wirings electrically connecting the first substrate and the second substrate to each other; a wiring protection member covering the side wirings; wherein the wiring protection member includes a protective layer and a plurality of conductive particles dispersed in the protective layer.

Abstract: A display device includes a first substrate on which a plurality of light-emitting elements are disposed; an optical film including an upper surface, a side surface and a lower surface, and disposed on one surface of the first substrate and; a second substrate bonded to another surface of the first substrate; a side surface line electrically connecting the first substrate and the second substrate with each other; a side surface sealing member covering the side surface line; and a conductive protective film covering the side surface sealing member and the optical film.

Abstract: A display device and a wearable device. The display device may include at least one display panel comprising multiple subsidiary display panels, wherein images output from the subsidiary panels are extended to one another to form a single screen image and at least one multi-channel lens including multiple subsidiary lenses to provide multiple channels for light incident onto the subsidiary lenses, respectively, wherein the subsidiary display panels are associated with the subsidiary lenses, respectively, and the subsidiary display panels are inclined at a first angle from a reference plane so that their front surfaces face the respective subsidiary lenses.

Abstract: A semiconductor system includes a controller configured to output a command and multiple addresses for performing a read modify write operation when the multiple addresses for performing a read operation have a logic level combination for selecting contiguous regions and configured to output first data for performing a write operation, and a semiconductor device configured to store the first data for performing the write operation as write data based on the command, configured to output internal data from a core circuit as the read operation is consecutively performed based on the command and the addresses, configured to generate parities by performing an error correction code (ECC) operation based on the internal data and the write data, and configured to store the write data and the parities in the core circuit.

Abstract: A glass laminate article includes: a resin layer provided on a first surface of a core substrate; and a glass substrate layer provided on the resin layer, wherein the resin layer has an initial modulus of 30 MPa to 250 MPa, the initial modulus being measured in a deformation range of 0.5% to 1.0%.

Abstract: Provided is a method and an apparatus for processing an image based on a neural network. The method includes forming an input image set by combining a visible light image and an infrared image, estimating an illuminant map representing an illuminant configuration of the input image set and a confidence score map representing a correlation between the visible light image and the infrared image, using a neural network model, and determining illuminant information of the visible light image based on the illuminant map and the confidence score map.

Abstract: A semiconductor device is provided. The semiconductor device includes a substrate, an active pattern extending in a first horizontal direction on the substrate, a gate electrode extending in a second horizontal direction different from the first horizontal direction on the active pattern, a source/drain region on at least one side of the gate electrode, a source/drain contact extending into the source/drain region and including a filling layer and a barrier layer along a sidewall of the filling layer, and a silicide layer between the source/drain region and the filling layer, the silicide layer including a first sidewall in contact with the filling layer and a second sidewall in contact with the source/drain region, wherein the barrier layer is not between the filling layer and the source/drain region.

Abstract: The present invention provides a battery safety test device includes: a mechanical switch element having one end connected to either a battery positive or negative electrode and the other end connected to an electronic switching element; the electronic switching element having one end connected to the mechanical switch element and the other end connected to the other of the battery positive or negative electrode; a voltage sensor for measuring a voltage of the battery after the mechanical switch element and the electronic switching element are turned on; and a current sensor for measuring a current of the battery after the mechanical switch element and the electronic switching element are turned on.

Abstract: One aspect of the present disclosure relates to a phase transfer cosmetic composition. According to the present disclosure, there can be provided a cosmetic composition which contains a wax having a melting point of 40 to 60° C. and an inulin-based surfactant, wherein the composition maintains a liquid state before applied to the skin and rubbed, and changes to a solid state when applied to the skin, can solve the problems in terms of hygiene and use because it is not used by scooping it by hand, and further, changes its phase to a solid state when applied to the skin and then rubbed, and thus, can solve the problem of dripping when applied to face or skin.

Abstract: Disclosed is a display device including: a first substrate on which a plurality of micro-LEDs are disposed; a second substrate bonded to one surface of the first substrate; a side wiring electrically connecting the first substrate and the second substrate to each other; a side surface sealing member covering the side wiring; and an antistatic film covering an outer surface of the side surface sealing member, wherein the side surface sealing member includes an organic filler and core-shell particles dispersed in the organic filler.

Abstract: A single memory package includes a package substrate; at least one of a memory chip and a buffer chip mounted on the package substrate; M×N number of interface data channel buses between the memory chip and the buffer chip; and (M×N)/2n number of outer data channel buses connected to the buffer chip. The buffer chip receives data from the memory chip through the interface data channel buses, and provides the data through the outer data channel buses. The M, N, and n are natural numbers.

Abstract: A semiconductor device and a method of fabricating the same are provided. According to the present invention, a semiconductor device comprises an active region formed in a substrate, and including flat surfaces and hole-shaped recess portions; upper-level plugs disposed over the flat surfaces; a spacer disposed between the upper-level plugs and providing a trench exposing the hole-shaped recess portions; a lower-level plug filling the hole-shaped recess portions; and a buried conductive line disposed over the lower-level plug and partially filling the trench.

Abstract: Disclosed are a frontside illuminated image sensor and a method of manufacturing the same. More particularly, a frontside illuminated image sensor and a method of manufacturing the frontside illuminated image sensor include a light scattering portion in a substrate, configured to increase a path of incident light, thereby preventing cross-talk between adjacent pixels and increasing light sensitivity.

Abstract: An apparatus and a method for registering a device in a cloud server are provided. The apparatus includes detecting the device by using short-range communication, requesting an authentication code used for registering the device in the cloud server from an account server in response to the device being detected, receiving the authentication code from the account server, and transmitting the received authentication code and connection address information of the cloud server to the device.

Abstract: A display device includes a display portion including a first surface, from which light is emitted in a first direction, and a second surface opposite to the first surface, a first optical portion disposed on the first surface, and a second optical portion disposed on the first surface to be spaced apart from the first optical portion in a second direction crossing the first direction. Each of the first and second optical portions includes a multi-channel lens through which the light from the first surface passes, a first infrared light source, a first camera, and a first lens frame coupled to the multi-channel lens in the first direction to support at least a portion of the multi-channel lens. The first lens frame may include a first recess structure in which the first infrared light source is disposed and a second recess structure in which the first camera is disposed.

Abstract: Disclosed is a display apparatus including emissive devices disposed in a display area, signal lines disposed in a non-display area, first touch electrodes disposed in the display area, the first touch electrodes being arranged in a first direction, second touch electrodes disposed in the display area while being arranged in a second direction perpendicular to the first direction, touch routing lines disposed in the non-display area, the touch routing lines being electrically connected to the first touch electrodes or the second touch electrodes, wherein the display area includes a first region including touch blocks surrounded by lines dividing the first touch electrodes into halves in the second direction and lines dividing the second touch electrodes into halves in the first direction and a second region provided so as to surround the first region, the touch blocks being disposed spaced apart from each other in the second region.

Abstract: A single memory package includes: a substrate; and a memory chip and a buffer chip that are integrated over the substrate, wherein the memory chip includes an interface modulator embedded therein, and the interface modulator is a serializing modulator including a multi-level amplitude modulator.

Abstract: A gene amplification chip includes a chamber layer, a cover layer, a bottom layer, an inlet, and an outlet. The chamber layer has a first passage and through holes which are formed on one side of the first passage. The cover layer is disposed on one side of the chamber layer and has a cover channel formed to communicate with the first passage and the through holes, wherein the cover channel, the first passage and the through holes allow passage of liquids in a divided manner. The bottom layer is disposed on another side of the chamber layer and has a bottom channel formed to communicate with the first passage and the through holes. The inlet is formed in the cover layer and communicates with the cover channel. The outlet communicates with any one of the cover channel and the bottom channel.

Abstract: A printed circuit board includes a first substrate portion including a plurality of first insulating layers, a plurality of first wiring layers respectively disposed on the plurality of first insulating layers, and a plurality of first adhesive layers respectively disposed between the plurality of first insulating layers to respectively cover the plurality of first wiring layers; and a second substrate portion disposed on the first substrate portion, and including a plurality of second insulating layers, a plurality of second wiring layers respectively disposed on the plurality of second insulating layers, and a plurality of second adhesive layers respectively disposed between the plurality of second insulating layers to respectively cover the plurality of second wiring layers.

Abstract: A method of manufacturing a semiconductor device includes: forming a trench in an insulating interlayer by etching the insulating interlayer; forming a conductive layer on bottom, side, and upper surfaces of the insulating interlayer where the trench is formed, using a first deposition process, the conductive layer on the bottom surface of the trench being thicker than the conductive layer on the side surface of the trench; forming a sacrificial layer in the trench covering the conductive layer formed on the bottom surface of the trench using a second deposition process different from the first deposition process; selectively removing the conductive layer formed on the upper surface of the insulating interlayer and formed on the side surface of the trench left exposed through the sacrificial layer; and selectively removing the sacrificial layer, to form a conductive line using the conductive layer remaining on the bottom surface of the trench.