Abstract: The present invention realizes high integration by utilizing an aluminum oxide as a capacitor insulating layer having a high dielectric constant, improving characteristics of a semiconductor device by using a low temperature vapor deposition and a low temperature annealing, improving leakage current characteristics by utilizing titanium as an upper electrode of the capacitor and reduces manufacturing costs by simplifying the capacitor manufacturing process. Therefore, the present invention is very useful and effective.

Abstract: A method for fabricating a ferroelectric capacitor of a semiconductor device is disclosed. This method carries out a patterning process of a capacitor electrode, which is difficult to handle in a dry etching process, with a lift-off method using a negative slope, photomask thereby ensuring stability in a fabricating process and enabling a control of parasitic capacitance. The method for fabricating a ferroelectric capacitor of a semiconductor device comprises depositing a photoresist, forming a mask by patterning the photoresist to have sides with a negative slope from an upper portion of the sides to a lower portion of the sides, forming a material layer for forming electrodes or a ferroelectric material layer to prevent deposition materials to come into contact with the side of the mask, eliminating the material layer for forming electrodes or the ferroelectric material layer on an upper surface of the mask with a lift-off method, while eliminating the mask at the same time.

Abstract: A garlic upright-positioning and planting device has a simple structure by which a garlic clove can be planted while the garlic clove is kept at its upright posture with its blunt root portion directed toward the ground. There is provided a garlic planting device for planting garlic cloves while maintaining an upright state, which comprises at least one guiding hopper for guiding a garlic clove with a root portion directed in a downward direction, and a planter for planting the garlic clove supplied from each of the guiding hoppers.

Abstract: A display device using a micro light modulator that is capable of applying to various display apparatus. The display device has a plurality of fixed members installed parallel to each other over a substrate, the member being apart from each other; and a plurality of moveable members being driven with the fixed members by a statically electric force to switch a path of lights incident from the substrate.

Abstract: A thin film transistor includes a low resistance metal film covering a drain region and an interconnecting metal line disposed thereon. Covering the drain region with the low resistance metal film reduces oxidation in the drain region, and thus reduces the contact resistance between the drain region and the interconnecting metal line.

Abstract: The present invention relates to a garlic planting device for planting garlic cloves while maintaining an upright state thereof at the time of planting the garlic cloves. The garlic planting device of the present invention comprises at least one guiding hopper for guiding a garlic clove with a root portion thereof directed in a downward direction, and a planting means for planting the garlic clove supplied from each of the guiding hoppers.

Abstract: The method includes forming a first insulating interlayer on a semiconductor substrate having a transistor thereon, depositing first to third metal layers on the first insulating interlayer, and depositing a first insulating layer on the third metal layer. Then, the first insulating layer is oxidized. A fourth metal layer is deposited on the first insulating layer. Selective etching is performed on the first insulating layer and the fourth metal layer to expose a predetermined portion of the third metal layer. Selective etching of the first to third metal layers then takes place to expose a surface of the first insulating interlayer. A second insulating layer is deposited over the substrate, and contact holes are formed by selectively removing the second insulating layer to expose the third and fourth metal layers. Metal plugs are formed in the contact holes, and a metal wire connected to each metal plug is formed.

Abstract: A method for fabricating a ferroelectric capacitor of a semiconductor device is disclosed. This method carries out a patterning process of a capacitor electrode, which is difficult to handle in a dry etching process, with a lift-off method using a negative slope, photomask thereby ensuring stability in a fabricating process and enabling a control of parasitic capacitance. The method for fabricating a ferroelectric capacitor of a semiconductor device comprises depositing a photoresist, forming a mask by patterning the photoresist to have sides with a negative slope from an upper portion of the sides to a lower portion of the sides, forming a material layer for forming electrodes or a ferroelectric material layer to prevent deposition materials to come into contact with the side of the mask, eliminating the material layer for forming electrodes or the ferroelectric material layer on an upper surface of the mask with a lift-off method, while eliminating the mask at the same time.

Abstract: A method for forming a polycrystalline silicon layer for TFT according to the present invention includes steps of: depositing an amorphous silicon layer and a silicon oxidation layer on a substrate in this order; and implanting semiconductor ions into the amorphous silicon layer and the silicon oxidation layer while heating the substrate, thereby converting the amorphous silicon layer into a polycrystalline silicon layer, and forming an amorphous oxidation layer between the amorphous silicon layer and the silicon oxidation layer.

Abstract: A method for forming a polycrystalline silicon layer for TFT according to the present invention includes steps of: depositing an amorphous silicon layer and a silicon oxidation layer on a substrate in this order; and implanting semiconductor ions into the amorphous silicon layer and the silicon oxidation layer while heating the substrate, thereby converting the amorphous silicon layer into a polycrystalline silicon layer, and forming an amorphous oxidation layer between the amorphous silicon layer and the silicon oxidation layer.

Abstract: A method for forming a polycrystalline silicon layer for TFT according to the present invention includes steps of: depositing an amorphous silicon layer and a silicon oxidation layer on a substrate in this order; and implanting semiconductor ions into the amorphous silicon layer and the silicon oxidation layer while heating the substrate, thereby converting the amorphous silicon layer into a polycrystalline silicon layer, and forming an amorphous oxidation layer between the amorphous silicon layer and the silicon oxidation layer.

Abstract: An active layer commonly used in a thin-film-transistor is made by irradiating an amorphous silicon layer with a laser source at an energy density sufficient to induce substantially complete melting to form a melted region and an unmelted region. The melted region of the amorphous silicon layer is solidified with a lateral grain growth from the unmelted region to the melted region. Then the amorphous silicon layer is translated relative to the laser source. In such an apparatus, the laser source is prepared by emitting a laser beam through a mask. The mask has a plurality of transparent regions which comprises slits arranged adjacent to or next to each other and separated by a predetermined distance in certain applications. Such pattern includes contiguous chevron-shaped lines with curved apexes. Alternatively, the pattern also includes slim rectangular apertures.