Patents by Inventor Won-Taeck JUNG
Won-Taeck JUNG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240005992Abstract: An operation method of a memory device, having a memory block connected with wordlines, includes: (1) receiving a command from a memory controller, (2) activating a first block selection signal controlling first pass transistors configured to connect the wordlines connected with the memory block with driving lines, and (3) controlling the wordlines such that a first operation corresponding to the command is performed. After the first operation is completed, the method further includes: (4) pre-charging channels of the memory block with a first voltage and (5) performing a mode recovery operation such that the wordlines are controlled with a recovery voltage. The mode recovery operation includes deactivating the first block selection signal.Type: ApplicationFiled: June 9, 2023Publication date: January 4, 2024Inventors: DONGJIN SHIN, SANG-WON PARK, WON-TAECK JUNG, BYUNGSOO KIM, SU CHANG JEON
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Patent number: 11742052Abstract: Disclosed is a nonvolatile memory device, which includes a memory cell array including cell strings, a row decoder connected with a ground selection transistor of each of the cell strings through a ground selection line, connected with memory cells of each of the cell strings through word lines, and connected with a string selection transistor of each of the cell strings through a string selection line, and a page buffer connected with the cell strings through bit lines. In a first period of a check operation, the page buffer applies a first bias voltage to the bit lines, and the row decoder applies a turn-off voltage to the ground selection line, a turn-on voltage to the string selection line, and a first check voltage to the word lines. In a second period of the check operation, the page buffer senses first changes of voltages of the bit lines.Type: GrantFiled: May 13, 2021Date of Patent: August 29, 2023Assignee: Samsung Electronics Co., Ltd.Inventors: Sang-Hyun Joo, Tae-Min Park, Hyungsoo Kim, Jaewoo Im, Won-Taeck Jung
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Publication number: 20230253059Abstract: A nonvolatile memory device includes a peripheral circuit region and a memory cell region vertically connected with the peripheral circuit region, the peripheral circuit region including at least one first metal pad, and the memory cell region including at least one second metal pad directly connected with the at least one first metal pad. A method of programming the nonvolatile memory device incudes: receiving a programming command, data for a plurality of pages, and an address corresponding to a selected word-line; programming the data for one of the pages to an unselected word-line; reading data of a previously programmed page from the selected word-line; and programming the data for the remaining pages and the data of the previously programmed page to the selected word-line.Type: ApplicationFiled: April 17, 2023Publication date: August 10, 2023Inventors: KYUNG-MIN KANG, DONGKU KANG, SU CHANG JEON, WON-TAECK JUNG
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Publication number: 20230178154Abstract: A three-dimensional (3D) nonvolatile memory device includes a cell string. The cell string includes a pillar structure comprising a ground selection transistor, a plurality of memory cells, and a string selection transistor stacked vertically over a substrate. The memory cells comprise a first cell group and a second cell group stacked on the first cell group, and a horizontal width of at least a portion of the pillar structure decreases in a depth direction towards the substrate. A method of programming the memory device includes initializing a channel of a memory cell of the first cell group of the cell string through the ground selection transistor of the pillar structure, and then applying a program voltage to the memory cell of the pillar structure of the cell string.Type: ApplicationFiled: January 31, 2023Publication date: June 8, 2023Inventors: WON-TAECK JUNG, SANG-WAN NAM, JINWOO PARK, JAEYONG JEONG
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Patent number: 11651829Abstract: A nonvolatile memory device includes a peripheral circuit region and a memory cell region vertically connected with the peripheral circuit region, the peripheral circuit region including at least one first metal pad, and the memory cell region including at least one second metal pad directly connected with the at least one first metal pad. A method of programming the nonvolatile memory device includes: receiving a programming command, data for a plurality of pages, and an address corresponding to a selected word-line; programming the data for one of the pages to an unselected word-line; reading data of a previously programmed page from the selected word-line; and programming the data for the remaining pages and the data of the previously programmed page to the selected word-line.Type: GrantFiled: July 29, 2020Date of Patent: May 16, 2023Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Kyung-Min Kang, Dongku Kang, Su Chang Jeon, Won-Taeck Jung
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Publication number: 20230145750Abstract: A nonvolatile memory may include; a first memory cell array including a first selection transistor connected to a first string selection line, a second memory cell array including a second selection transistor connected to a second string selection line and spaced apart from the first string selection line by a first cutting line, and a peripheral circuit. The peripheral circuit may provide a first program voltage to the first selection transistor, provide a second program voltage to the second selection transistor different from the first program voltage, program the first selection transistor with a first threshold voltage in response to the first program voltage, and program the second selection transistor with a second threshold voltage level greater than the first threshold voltage in response to the second program voltage.Type: ApplicationFiled: March 28, 2022Publication date: May 11, 2023Inventors: SANG-WON PARK, WON-TAECK JUNG, HAN-JUN LEE, SU CHANG JEON
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Patent number: 11625302Abstract: A method of programming a nonvolatile memory device includes: receiving a programming command, data for a plurality of pages, and an address corresponding to a selected word-line; programming the data for one of the pages to an unselected word-line; reading data of a previously programmed page from the selected word-line; and programming the data for the remaining pages and the data of the previously programmed page to the selected word-line.Type: GrantFiled: November 22, 2019Date of Patent: April 11, 2023Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Kyung-Min Kang, Dongku Kang, Su Chang Jeon, Won-Taeck Jung
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Patent number: 11594283Abstract: A three-dimensional (3D) nonvolatile memory device includes a cell string. The cell string includes a pillar structure comprising a ground selection transistor, a plurality of memory cells, and a string selection transistor stacked vertically over a substrate. The memory cells comprise a first cell group and a second cell group stacked on the first cell group, and a horizontal width of at least a portion of the pillar structure decreases in a depth direction towards the substrate. A method of programming the memory device includes initializing a channel of a memory cell of the first cell group of the cell string through the ground selection transistor of the pillar structure, and then applying a program voltage to the memory cell of the pillar structure of the cell string.Type: GrantFiled: November 10, 2021Date of Patent: February 28, 2023Assignee: Samsung Electronics Co., Ltd.Inventors: Won-Taeck Jung, Sang-Wan Nam, Jinwoo Park, Jaeyong Jeong
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Patent number: 11450389Abstract: A non-volatile memory device including: a first string including a first string select transistor, a first memory cell and a first ground select transistor, a second string including a second string select transistor, a second memory cell and a second ground select transistor, and a controller to apply a pass voltage to a first string select line from a first time, apply a first read voltage to a first word line during a first read section from the first time to a second time, apply a first ground select line voltage to a first ground select line from the first time, apply a ground voltage to a second string select line, apply the first ground select line voltage to a second ground select line during a first control section, and apply a first common source line voltage to a common source line during the first control section.Type: GrantFiled: March 9, 2021Date of Patent: September 20, 2022Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Jun-Ho Seo, Jung Ho Lee, Dae Sik Ham, Gi Baek Kim, Sang Yong Yoon, Won-Taeck Jung
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Publication number: 20220093206Abstract: Disclosed is a nonvolatile memory device, which includes a memory cell array including cell strings, a row decoder connected with a ground selection transistor of each of the cell strings through a ground selection line, connected with memory cells of each of the cell strings through word lines, and connected with a string selection transistor of each of the cell strings through a string selection line, and a page buffer connected with the cell strings through bit lines. In a first period of a check operation, the page buffer applies a first bias voltage to the bit lines, and the row decoder applies a turn-off voltage to the ground selection line, a turn-on voltage to the string selection line, and a first check voltage to the word lines. In a second period of the check operation, the page buffer senses first changes of voltages of the bit lines.Type: ApplicationFiled: May 13, 2021Publication date: March 24, 2022Applicant: Samsung Electronics Co., Ltd.Inventors: Sang-Hyun JOO, Tae-Min PARK, Hyungsoo KIM, Jaewoo IM, Won-Taeck JUNG
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Publication number: 20220068397Abstract: A three-dimensional (3D) nonvolatile memory device includes a cell string. The cell string includes a pillar structure comprising a ground selection transistor, a plurality of memory cells, and a string selection transistor stacked vertically over a substrate. The memory cells comprise a first cell group and a second cell group stacked on the first cell group, and a horizontal width of at least a portion of the pillar structure decreases in a depth direction towards the substrate. A method of programming the memory device includes initializing a channel of a memory cell of the first cell group of the cell string through the ground selection transistor of the pillar structure, and then applying a program voltage to the memory cell of the pillar structure of the cell string.Type: ApplicationFiled: November 10, 2021Publication date: March 3, 2022Inventors: WON-TAECK JUNG, SANG-WAN NAM, JINWOO PARK, JAEYONG JEONG
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Publication number: 20220020438Abstract: A non-volatile memory device including: a first string including a first string select transistor, a first memory cell and a first ground select transistor, a second string including a second string select transistor, a second memory cell and a second ground select transistor, and a controller to apply a pass voltage to a first string select line from a first time, apply a first read voltage to a first word line during a first read section from the first time to a second time, apply a first ground select line voltage to a first ground select line from the first time, apply a ground voltage to a second string select line, apply the first ground select line voltage to a second ground select line during a first control section, and apply a first common source line voltage to a common source line during the first control section.Type: ApplicationFiled: March 9, 2021Publication date: January 20, 2022Inventors: Jun-Ho SEO, Jung Ho LEE, Dae Sik HAM, Gi Baek KIM, Sang Yong YOON, Won-Taeck JUNG
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Patent number: 11222697Abstract: A nonvolatile memory device performs a read operation comprising first and second intervals. In the first interval the device applies a turn-on voltage to string selection lines and ground selection lines connected to the string selection transistors and the ground selection transistors, respectively. In the second interval, the device applies a turn-off voltage to unselected string selection lines and unselected ground selection lines while continuing to apply the turn-on voltage to a selected string selection line and a selected ground selection line. In both the first and second intervals, the device applies a first read voltage to a selected wordline connected to memory cells to be read by the read operation and applying a second read voltage to unselected wordlines among connected to memory cells not to be read by the read operation.Type: GrantFiled: September 16, 2020Date of Patent: January 11, 2022Assignee: Samsung Electronics Co., Ltd.Inventors: Sang-Wan Nam, Won-Taeck Jung
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Patent number: 11200955Abstract: A three-dimensional (3D) nonvolatile memory device includes a cell string. The cell string includes a pillar structure comprising a ground selection transistor, a plurality of memory cells, and a string selection transistor stacked vertically over a substrate. The memory cells comprise a first cell group and a second cell group stacked on the first cell group, and a horizontal width of at least a portion of the pillar structure decreases in a depth direction towards the substrate. A method of programming the memory device includes initializing a channel of a memory cell of the first cell group of the cell string through the ground selection transistor of the pillar structure, and then applying a program voltage to the memory cell of the pillar structure of the cell string.Type: GrantFiled: January 6, 2020Date of Patent: December 14, 2021Assignee: Samsung Electronics Co., Ltd.Inventors: Won-Taeck Jung, Sang-Wan Nam, Jinwoo Park, Jaeyong Jeong
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Publication number: 20200411097Abstract: A nonvolatile memory device performs a read operation comprising first and second intervals. In the first interval the device applies a turn-on voltage to string selection lines and ground selection lines connected to the string selection transistors and the ground selection transistors, respectively. In the second interval, the device applies a turn-off voltage to unselected string selection lines and unselected ground selection lines while continuing to apply the turn-on voltage to a selected string selection line and a selected ground selection line. In both the first and second intervals, the device applies a first read voltage to a selected wordline connected to memory cells to be read by the read operation and applying a second read voltage to unselected wordlines among connected to memory cells not to be read by the read operation.Type: ApplicationFiled: September 16, 2020Publication date: December 31, 2020Inventors: SANG-WAN NAM, WON-TAECK JUNG
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Publication number: 20200394106Abstract: A method of programming a nonvolatile memory device includes: receiving a programming command, data for a plurality of pages, and an address corresponding to a selected word-line; programming the data for one of the pages to an unselected word-line; reading data of a previously programmed page from the selected word-line; and programming the data for the remaining pages and the data of the previously programmed page to the selected word-line.Type: ApplicationFiled: November 22, 2019Publication date: December 17, 2020Inventors: Kyung-Min KANG, Dongku KANG, Su Chang JEON, Won-Taeck JUNG
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Publication number: 20200395090Abstract: A nonvolatile memory device includes a peripheral circuit region and a memory cell region vertically connected with the peripheral circuit region, the peripheral circuit region including at least one first metal pad, and the memory cell region including at least one second metal pad directly connected with the at least one first metal pad. A method of programming the nonvolatile memory device includes: receiving a programming command, data for a plurality of pages, and an address corresponding to a selected word-line; programming the data for one of the pages to an unselected word-line; reading data of a previously programmed page from the selected word-line; and programming the data for the remaining pages and the data of the previously programmed page to the selected word-line.Type: ApplicationFiled: July 29, 2020Publication date: December 17, 2020Inventors: KYUNG-MIN KANG, Dongku Kang, Su Chang Jeon, Won-Taeck Jung
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Patent number: 10839910Abstract: A nonvolatile memory device performs a read operation comprising first and second intervals. In the first interval the device applies a turn-on voltage to string selection lines and ground selection lines connected to the string selection transistors and the ground selection transistors, respectively. In the second interval, the device applies a turn-off voltage to unselected string selection lines and unselected ground selection lines while continuing to apply the turn-on voltage to a selected string selection line and a selected ground selection line. In both the first and second intervals, the device applies a first read voltage to a selected wordline connected to memory cells to be read by the read operation and applying a second read voltage to unselected wordlines among connected to memory cells not to be read by the read operation.Type: GrantFiled: October 31, 2019Date of Patent: November 17, 2020Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Sang-Wan Nam, Won-Taeck Jung
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Patent number: 10803947Abstract: A nonvolatile memory device performs a read operation comprising first and second intervals. In the first interval the device applies a turn-on voltage to string selection lines and ground selection lines connected to the string selection transistors and the ground selection transistors, respectively. In the second interval, the device applies a turn-off voltage to unselected string selection lines and unselected ground selection lines while continuing to apply the turn-on voltage to a selected string selection line and a selected ground selection line. In both the first and second intervals, the device applies a first read voltage to a selected wordline connected to memory cells to be read by the read operation and applying a second read voltage to unselected wordlines among connected to memory cells not to be read by the read operation.Type: GrantFiled: February 26, 2020Date of Patent: October 13, 2020Assignee: Samsung Electronics Co., Ltd.Inventors: Sang-Wan Nam, Won-Taeck Jung
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Patent number: 10770148Abstract: An operation method of a nonvolatile memory device includes applying a program voltage to a selected word line and programming a selected memory cell connected to the selected word line; reading an adjacent memory cell connected to an adjacent word line of the selected word line; and verifying the selected memory cell by adjusting charge sharing between the selected memory cell and a sensing node, which is connected to the selected memory cell through a bit line.Type: GrantFiled: April 23, 2018Date of Patent: September 8, 2020Assignee: Samsung Electronics Co., Ltd.Inventors: Won-Taeck Jung, So-Yeong Gwak, Sang-Wan Nam