Abstract: A liquid crystal display device includes a substrate; a gate line and a data line positioned on the substrate; a thin film transistor connected to the gate line and the data line; a passivation layer positioned on the gate line, the data line, and the thin film transistor; a first electrode positioned on the passivation layer; an interlayer insulating layer positioned on the first electrode; and a second electrode positioned on the interlayer insulating layer, wherein the first electrode includes a first layer made of an indium-zinc oxide in which a weight ratio of an indium oxide is 20 wt % or less or made of a transparent metal oxide that does not contain an indium oxide.

Abstract: A thin film transistor array panel is disclosed. The thin film transistor array panel may include a gate line disposed on a substrate and including a gate electrode, a semiconductor layer including an oxide semiconductor disposed on the substrate, a data wiring layer disposed on the substrate and including a data line crossing the gate line, a source electrode connected to the data line and a drain electrode facing the source electrode, a polymer layer covering the source electrode and the drain electrode, and a passivation layer disposed on the polymer layer. The data wiring layer may include copper or a copper alloy and the polymer layer may include fluorocarbon.

Abstract: A method of fabricating a display substrate includes forming a gate electrode on a substrate, forming a gate insulating layer to cover the gate electrode, forming an active layer on the gate insulating layer, forming a metal layer on the active layer, forming a first mask pattern on the metal layer to face a first region of the active layer, forming a second mask pattern on the metal layer to face a second region and a third region of the active layer, etching the metal layer and the active layer using the first and second mask patterns as an etch mask to form a metal pattern and an active pattern, removing the first mask pattern, and etching the metal pattern using the second mask pattern as an etch mask to form a source electrode and a drain electrode.

Abstract: A thin film transistor array panel is disclosed. The thin film transistor array panel may include a gate line disposed on a substrate and including a gate electrode, a semiconductor layer including an oxide semiconductor disposed on the substrate, a data wiring layer disposed on the substrate and including a data line crossing the gate line, a source electrode connected to the data line and a drain electrode facing the source electrode, a polymer layer covering the source electrode and the drain electrode, and a passivation layer disposed on the polymer layer. The data wiring layer may include copper or a copper alloy and the polymer layer may include fluorocarbon.

Abstract: A method of fabricating a display substrate includes forming a gate electrode on a substrate, forming a gate insulating layer to cover the gate electrode, forming an active layer on the gate insulating layer, forming a metal layer on the active layer, forming a first mask pattern on the metal layer to face a first region of the active layer, forming a second mask pattern on the metal layer to face a second region and a third region of the active layer, etching the metal layer and the active layer using the first and second mask patterns as an etch mask to form a metal pattern and an active pattern, removing the first mask pattern, and etching the metal pattern using the second mask pattern as an etch mask to form a source electrode and a drain electrode.

Abstract: A display panel includes a base substrate having a plurality of pixel areas, in which each pixel area includes a plurality of sub-pixel areas, a light blocking layer pattern generally defining the sub-pixel areas, and a plurality of color filter patterns. Upper surfaces of the light blocking layer pattern and the plurality of color filter patterns collectively form a generally flat surface.

Abstract: A thin-film transistor includes a metal electrode and a zinc oxide-based barrier film that blocks a material from diffusing out of the metal electrode. The zinc oxide-based barrier film is made of zinc oxide doped with indium oxide, the content of the indium oxide ranging, by weight, 1 to 50 percent of the zinc oxide-based barrier film. A zinc oxide-based sputtering target for deposition of a barrier film of a thin-film transistor is made of zinc oxide doped with indium oxide, the content of the indium oxide ranging, by weight, 1 to 50 percent of the zinc oxide-based sputtering target.

Abstract: A thin film transistor array panel is disclosed. The thin film transistor array panel may include a gate line disposed on a substrate and including a gate electrode, a semiconductor layer including an oxide semiconductor disposed on the substrate, a data wiring layer disposed on the substrate and including a data line crossing the gate line, a source electrode connected to the data line and a drain electrode facing the source electrode, a polymer layer covering the source electrode and the drain electrode, and a passivation layer disposed on the polymer layer. The data wiring layer may include copper or a copper alloy and the polymer layer may include fluorocarbon.

Abstract: A method for forming a fine exposure pattern where a width and an interval of the pattern are each 1CD, by first exposing a photoresist by using an exposure mask where an interval ratio of a light shielding part and a light transmission part is 2CD:1CD to 4CD:1CD, and then second exposing the photoresist after the exposure mask is shifted at a predetermined interval, or second exposing the photoresist by using an exposure mask formed at a position where a light transmission part is shifted at a predetermined interval, and developing the photoresist, such that it is possible to form a display device having a pixel electrode including a plurality of fine branch electrodes having a smaller width and interval than a resolution of an exposure apparatus.

Abstract: A thin film transistor array panel is disclosed. The thin film transistor array panel may include a gate line disposed on a substrate and including a gate electrode, a semiconductor layer including an oxide semiconductor disposed on the substrate, a data wiring layer disposed on the substrate and including a data line crossing the gate line, a source electrode connected to the data line and a drain electrode facing the source electrode, a polymer layer covering the source electrode and the drain electrode, and a passivation layer disposed on the polymer layer. The data wiring layer may include copper or a copper alloy and the polymer layer may include fluorocarbon.

Abstract: Provided are a zinc oxide-based sputtering target, a method of preparing the same, and a thin film transistor including a barrier layer deposited by the zinc oxide-based sputtering target. The zinc oxide-based sputtering target includes a sintered body that is composed of zinc oxide in which indium oxide is doped in a range from about 1% w/w to about 50% w/w. A backing plate is coupled to a back of the sintered body. The backing plate supports the sintered body.

Abstract: The present invention relates to a photoresist composition for digital exposure and a method of fabricating a thin film transistor substrate. The photoresist composition for digital exposure includes a binder resin including a novolak resin and a compound represented by the chemical formula (1), a photosensitizer including a diazide-based compound, and a solvent: wherein R1-R9 each include a hydrogen atom, an alkyl group, or a benzyl group, a is an integer from 0 to 10, b is an integer from 0 to 100, and c is an integer from 0 to 10.

Abstract: A thin-film transistor includes a metal electrode and a zinc oxide-based barrier film that blocks a material from diffusing out of the metal electrode. The zinc oxide-based barrier film is made of zinc oxide doped with indium oxide, the content of the indium oxide ranging, by weight, 1 to 50 percent of the zinc oxide-based barrier film. A zinc oxide-based sputtering target for deposition of a barrier film of a thin-film transistor is made of zinc oxide doped with indium oxide, the content of the indium oxide ranging, by weight, 1 to 50 percent of the zinc oxide-based sputtering target.

Abstract: A zinc oxide (ZnO)-based sputtering target, a method of manufacturing the same, and a thin-film transistor (TFT) having a barrier layer deposited using the same. The zinc oxide-based sputtering target includes a sinter containing zinc oxide doped with gallium oxide, the content of the gallium oxide ranging, by weight, from 10 to 50 percent of the sinter, and a backing plate bonded to the rear surface of the sinter to support the sinter. The zinc oxide-based sputtering target can be subjected to direct current (DC) sputtering, and improve the contact and etching characteristics of a barrier layer that is deposited using the same.

Abstract: A method for forming a fine exposure pattern where a width and an interval of the pattern are each 1CD, by first exposing a photoresist by using an exposure mask where an interval ratio of a light shielding part and a light transmission part is 2CD:1CD to 4CD:1CD, and then second exposing the photoresist after the exposure mask is shifted at a predetermined interval, or second exposing the photoresist by using an exposure mask formed at a position where a light transmission part is shifted at a predetermined interval, and developing the photoresist, such that it is possible to form a display device having a pixel electrode including a plurality of fine branch electrodes having a smaller width and interval than a resolution of an exposure apparatus.

Abstract: A display panel includes a base substrate having a plurality of pixel areas, in which each pixel area includes a plurality of sub-pixel areas, a light blocking layer pattern generally defining the sub-pixel areas, and a plurality of color filter patterns. Upper surfaces of the light blocking layer pattern and the plurality of color filter patterns collectively form a generally flat surface.

Abstract: A photoresist composition suitable for forming a high-resolution pattern, and a method of forming a photoresist pattern using the same. The photoresist composition includes about 10 to about 45 parts by weight of an alkali soluble binder resin including a hydroxyl group, about 0.1 to about 5 parts by weight of a photo-acid generator, about 1 to about 5 parts by weight of a cross-linker that cross-links the alkali-soluble binder resin including the hydroxyl group, about 0.3 to about 3 parts by weight of a quinone diazide compound, and a remainder of a solvent.

Abstract: A photoresist composition includes about 100 parts by weight of resin mixture including novolak resin and acryl resin and about 10 parts to about 50 parts by weight of naphthoquinone diazosulfonic acid ester. A weight-average molecular weight of the novolak resin is no less than about 30,000. A weight-average molecular weight of the acryl resin is no less than about 20,000. The acryl resin makes up about 1% to about 15% of the total weight of the resin mixture. When a photoresist film formed using the photoresist composition is heated, a profile variation of the photoresist composition is relatively small. Therefore, a residual photoresist film has a uniform thickness, and a short circuit and/or an open defect in a TFT substrate may be reduced.

Abstract: A halftone mask includes a transparent substrate, a light-blocking layer, a first semi-transparent layer and a second semi-transparent layer. The transparent substrate includes a light-blocking area, a light-transmitting area, a first halftone area transmitting first light, and a second halftone area transmitting second light that is less than the first light. The light-blocking layer is formed in the light-blocking area to fully block light from being transmitted. The first and second semi-transparent layers are formed on the transparent substrate. At least one of the first and second semi-transparent layers is formed in the first halftone area, and the first and second semi-transparent layers are overlapped with each other on the second halftone area.

Abstract: A mask includes a transparent substrate, a light-blocking layer and a halftone layer. The light-blocking layer includes a source electrode pattern portion including a first electrode portion, a second electrode portion and a third electrode portion, and a drain electrode pattern portion disposed between the second electrode portion and the third electrode portion. The halftone layer includes a halftone portion corresponding to a spaced-apart portion between the source electrode pattern portion and the drain electrode pattern portion, and a dummy halftone portion more protrusive than ends of the second electrode portion and the third electrode portion. Thus, a photoresist pattern corresponding to a channel portion of a thin film transistor (TFT) may be formed with a uniform thickness, to thereby prevent an excessive etching of the channel portion.